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SH7021 Datasheet(PDF) 307 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 509 page ![]() RENESAS 291 10.6.7 Contention Between Counter Clearing by Input Capture and Counter Increment If an input capture signal and counter increment signal occur simultaneously, the counter is cleared according to the input capture signal. The counter is not incremented by the increment signal. The TCNT value before the counter is cleared is transferred to the general register. The timing is shown in figure 10.64. N H'0000 CK Input capture signal Counter clear signal TCNT input clock TCNT GR N Figure 10.64 Contention between Counter Clearing by Input Capture and Counter Increment |
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