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Table 10.18 ITU Operating Modes (Channel 0)

TSNC

TMDR

TFCR

TOCR

TIOR0

TCR0

Operating

Mode

Sync

MDF FDIR PWM

Comp

PWM

Reset

Sync

PWM

Buf-

fer

Output

Level

Select IOA

IOB

Clear

Select

Clock

Select

Synch-

ronized

preset

SYNC0

= 1

——

√

———

—

√√

√

PWM

√

——

PWM0

= 1

———

—

√√

√

Output

compare A

function

√

——

PWM0

= 0

———

—

IOA2 =

0, others

free

√√

√

Output

compare B

function

√

——

√

———

—

√

IOB2 =

0, others

free

√√

Input

capture A

function

√

——

PWM0

= 0

———

—

IOA2 =

1, others

free

√√

√

Input

capture B

function

√

——

PWM0

= 0

———

—

√

IOB2 =

1, others

free

√√

Counter Clear Function

Clear at

compare

match/

input

capture A

√

——

√

———

—

√√

CCLR1

= 0

CCLR0

= 1

√

Clear at

compare

match/

input

capture B

√

——

√

———

—

√√

CCLR1

= 1

CCLR0

= 0

√

Synch-

ronized

clear

SYNC0

= 1

——

√

———

—

√√

CCLR1

= 1

CCLR0

= 1

√

√: Settable, —: Setting does not affect current mode

Note:

In PWM mode, the input capture function cannot be used. When compare match A and

compare match B occur simultaneously, the compare match signal is inhibited.

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