R8CSLASH15 datasheet(69/277 Pages) RENESAS

69 / 277 page

R8C/14 Group, R8C/15 Group

11. Interrupt

Rev.2.10

Jan 19, 2006

Page 57 of 253

REJ09B0164-0210

11.1.2

Software Interrupts

A software interrupt is generated when an instruction is executed. The software interrupts are non-

maskable interrupts.

11.1.2.1

Undefined Instruction Interrupt

The undefined instruction interrupt is generated when the UND instruction is executed.

11.1.2.2

Overflow Interrupt

The overflow interrupt is generated when the O flag is set to “1” (arithmetic operation overflow) and

the INTO instruction is executed. Instructions to set the O flag are:

ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB

11.1.2.3

BRK Interrupt

A BRK interrupt is generated when the BRK instruction is executed.

11.1.2.4

INT Instruction Interrupt

An INT instruction interrupt is generated when the INT instruction is executed. The INT instruction

can select software interrupt numbers 0 to 63. Software interrupt numbers 4 to 31 are assigned to the

peripheral function interrupt. Therefore, the microcomputer executes the same interrupt routine when

the INT instruction is executed as when a peripheral function interrupt is generated. In software

interrupt numbers 0 to 31, the U flag is saved to the stack during instruction execution and set the U

flag to “0” (ISP selected) before executing an interrupt sequence. The U flag is restored from the

stack when returning from the interrupt routine. In software interrupt numbers 32 to 63, the U flag

does not change state during instruction execution, and the selected SP is used.

R8C/15 Datasheet(PDF) 69 Page - Renesas Technology Corp