R8CSLASH15 datasheet(10/277 Pages) RENESAS

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20.2.1

Reading Address 00000h .................................................................236

20.2.2

SP Setting.........................................................................................236

20.2.3

External Interrupt and Key Input Interrupt ........................................236

20.2.4

Watchdog Timer Interrupt.................................................................236

20.2.5

Changing Interrupt Factor.................................................................237

20.2.6

Changing Interrupt Control Register.................................................238

20.3

Clock Generation Circuit .........................................................................239

20.3.1

Oscillation Stop Detection Function..................................................239

20.3.2

Oscillation Circuit Constants.............................................................239

20.4

Timers .....................................................................................................240

20.4.1

Timers X and Z .................................................................................240

20.4.2

Timer X .............................................................................................240

20.4.3

Timer Z .............................................................................................241

20.4.4

Timer C.............................................................................................241

20.5

Serial Interface ........................................................................................242

20.6

Clock Synchronous Serial I/O (SSU) with Chip Select............................243

20.6.1

Access Registers Associated with SSU ...........................................243

20.7

A/D Converter..........................................................................................244

20.8

Flash Memory Version ............................................................................245

20.8.1

CPU Rewrite Mode...........................................................................245

20.9

Noise .......................................................................................................248

20.9.1

Insert a bypass capacitor between VCC and VSS pins as the

countermeasures against noise and latch-up...................................248

20.9.2

Countermeasures against Noise Error of Port Control Registers.....248

21. Precaution for On-chip Debugger

249

Appendix 1. Package Dimensions

250

Appendix 2. Connecting Example between Serial Writer and On-Chip

Debugging Emulator

251

Appendix 3. Example of Oscillation Evaluation Circuit

252

253

R8C/15 Datasheet(PDF) 10 Page - Renesas Technology Corp

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