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R8C/15 Datasheet(PDF) 99 Page - Renesas Technology Corp

Part # R8C/15
Description  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / R8C/Tiny SERIES
PDF  277 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C/15 Datasheet(HTML) 99 Page - Renesas Technology Corp

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R8C/14 Group, R8C/15 Group
13. Timers
Rev.2.10
Jan 19, 2006
Page 87 of 253
REJ09B0164-0210
13.1.1
Timer Mode
Timer mode is mode to count the count source which is internally generated (See Table 13.2
Specification of Timer Mode). Figure 13.4 shows the TXMR Register in Timer Mode.
Figure 13.4
TXMR Register in Timer Mode
Table 13.2
Specification of Timer Mode
Item
Specification
Count Source
f1, f2, f8, fRING
Count Operation
• Decrement
• When the timer underflows, the contents in the reload register is reloaded and
the count is inherited
Divide Ratio
1/(n+1)(m+1) n: setting value of PREX register, m: setting value of TX register
Count Start Condition
Write “1” (count starts) to the TXS bit in the TXMR register
Count Stop Condition
Write “0” (count stops) to the TXS bit in the TXMR register
Interrupt Request
Generation Timing
When Timer X underflows [Timer X interrupt]
INT10/CNTR00,
INT11/CNTR01 Pin
Function
Programmable I/O port, or INT1 interrupt input
CNTR0 Pin Function
Programmable I/O port
Read from Timer
The count value can be read by reading the TX and PREX registers
Write to Timer
• When writing to the TX and PREX registers while the count stops, the value is
written to both the reload register and counter.
• When writing to the TX and PREX registers during the count, the value is
written to each reload register of the TX and PREX registers at the following
count source input and the data is transferred to the counter at the second
count source input and the count re-starts at the third count source input.
Timer X Mode Register
Symbol
Address
After Reset
TXMR
008Bh
00h
Bit Symbol
Bit Name
Function
RW
INT1
_____
/CNTR0 Signal
Polarity Sw itch Bit(1, 2)
NOTES :
1.
2.
3. Refer to 20.4.2 Tim er X for precautions on the TXS bit.
The IR bit in the INT1IC register may be set to “1” (requests interrupt) w hen the R0EDG bit is rew ritten.
Refer to 20.2.5 Changing Interrupt Factor.
R0EDG
RW
RW
TXOCNT
RW
TXMOD2
This bit is used to select the polarity of INT1
_____
interrupt in timer mode.
Set to “0” in timer mode
TXMOD0
RW
Operating Mode Select Bit 0, 1
b1 b0
0 0 : Timer mode or pulse period measurement
mode
TXMOD1
RW
0
0
b7 b6 b5 b4
0000 0
RW
b3 b2
0 : Rising edge
1 : Falling edge
TXS
Timer X Count Start Flag(3)
0 : Stops counting
1 : Starts counting
b1 b0
RW
TXUND
RW
TXEDG
Set to “0” in timer mode
Set to “0” in timer mode
Operating Mode Select Bit 2
0 : Other than pulse period measurement mode



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