R8CSLASH15 datasheet(85/277 Pages) RENESAS

85 / 277 page

R8C/14 Group, R8C/15 Group

11. Interrupt

Rev.2.10

Jan 19, 2006

Page 73 of 253

REJ09B0164-0210

Figure 11.16

TCC1 Register

Timer C Control Register 1

Symbol

Address

After Reset

TCC1

009Bh

00h

Bit Symbol

Bit Name

Function

INT3

_____

Filter Select Bit(1)

NOTES :

Compare 0 / Capture Select Bit 0 : Capture Select (input capture mode) (2)

1 : Compare 0 Output Select

(output compare mode)

b1b0

0 0 : No filter

0 1 : Filter w ith f1 sampling

1 0 : Filter w ith f8 sampling

1 1 : Filter w ith f32 sampling

TCC15

TCC14

Compare 0 Output Mode Select

Bit(3)

b5 b4

0 0 : CMP output remains unchanged even

w hen compare 0 is matched

0 1 : CMP output is reversed w hen compare

0 signal is matched

1 0 : CMP output is set to “L” w hen compare

0 signal is matched

1 1 : CMP output is set to “H” w hen compare

0 signal is matched

When the TCC00 bit in the TCC0 register is set to “0” (count stop), rew rite the TCC13 bit.

TCC16

TCC17

When the same value from the INT3

_____

pin is sampled three times continuously, the input is determined.

Compare 1 Output Mode Select

Bit(3)

b7 b6

0 0 : CMP output remains unchanged even

w hen compare 1 is matched

0 1 : CMP output is reversed w hen compare

1 signal is matched

1 0 : CMP output is set to “L” w hen compare

1 signal is matched

1 1 : CMP output is set to “H” w hen compare

1 signal is matched

0 : No reload

1 : Set TC register to “0000h” w hen compare 1

is matched

b7 b6 b5 b4

When the TCC13 bit is set to “0” (input capture mode), set the TCC12, TCC14 to TCC17 bits to “0”.

TCC12

Timer C Counter Reload Select

Bit(2,3)

TCC11

TCC10

TCC13

b3 b2

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