R8CSLASH15 datasheet(77/277 Pages) RENESAS

77 / 277 page

R8C/14 Group, R8C/15 Group

11. Interrupt

Rev.2.10

Jan 19, 2006

Page 65 of 253

REJ09B0164-0210

11.1.6.5

Interrupt Response Time

Figure 11.6 shows an Interrupt Response Time. The interrupt response time is the period between

an interrupt request generation and the execution of the first instruction in an interrupt routine. An

interrupt response time includes the period between an interrupt request generation and the

completed execution of an instruction (see #a in Figure 11.6) and the period required to perform an

interrupt sequence (20 cycles, see #b in Figure 11.6).

Figure 11.6

Interrupt Response Time

11.1.6.6

IPL Change when Interrupt Request is Acknowledged

When an interrupt request of a maskable interrupt is acknowledged, the interrupt priority level of the

acknowledged interrupt is set in the IPL.

When a software interrupt and special interrupt request are acknowledged, the level listed in Table

11.5 is set to the IPL. Table 11.5 lists the IPL Value When Software or Special Interrupts Is

Acknowledged.

Table 11.5

IPL Value When Software or Special Interrupts Is Acknowledged

Interrupt Factor

Value Set to IPL

Watchdog Timer, Oscillation Stop Detection, Voltage Monitor 2 7

Software, Address Match, Single-Step

Not changed

Interrupt request is generated Interrupt request is acknowledged

Instruction

Interrupt Sequence

Instruction in

interrupt routine

Time

(a)

20 Cycles (b)

Interrupt Response Time

(a) Period between an interrupt request generation and the completed execution of an

instruction. The length of this time varies depending on the instruction being executed.

The DIVX instruction requires the longest time; 30 cycles (no wait and when the register

is set as the divisor)

(b) 21 cycles for address match and single-step interrupts.

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