R8CSLASH15 datasheet(100/277 Pages) RENESAS

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R8C/14 Group, R8C/15 Group

13. Timers

Rev.2.10

Jan 19, 2006

Page 88 of 253

REJ09B0164-0210

13.1.2

Pulse Output Mode

Pulse output mode is mode to count the count source internally generated and outputs the pulse

which inverts the polarity from the CNTR0 pin each time the timer underflows (See Table 13.3

Specification of Pulse Output Mode). Figure 13.5 shows TXMR Register in Pulse Output Mode.

NOTES:

1. The level of the output pulse becomes the level when the pulse output starts when the TX register is

written to.

Table 13.3

Specification of Pulse Output Mode

Item

Specification

Count Source

f1, f2, f8, fRING

Count Operation

• Decrement

• When the timer underflows, the contents in the reload register is reloaded and

the count is inherited

Divide Ratio

1/(n+1)(m+1) n: setting value of PREX register, m: setting value of TX register

Count Start Condition

Write “1” (count starts) to the TXS bit in the TXMR register

Count Stop Condition

Write “0” (count stops) to the TXS bit in the TXMR register

Interrupt Request

Generation Timing

When Timer X underflows [Timer X interrupt]

INT10/CNTR00 Pin

Function

Pulse output

CNTR0 Pin Function

Programmable I/O port or inverted output of CNTR0

Read from timer

The count value can be read by reading the TX and PREX registers.

Write to Timer

• When writing to the TX and PREX registers while the count stops, the value is

written to both the reload register and counter.

• When writing to the TX and PREX registers during the count, the value is

written to each reload register of the TX and PREX registers at the following

count source input and the data is transferred to the counter at the second

count source input and the count re-starts at the third count source input.

Select Function

•INT1/CNTR0 signal polarity switch function

The R0EDG bit can select the polarity level when the pulse output starts(1)

• Inverted pulse output function

The pulse which inverts the polarity of the CNTR0 output can be output from

the CNTR0 pin (selected by TXOCNT bit)

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