R8CSLASH15 datasheet(88/277 Pages) RENESAS

88 / 277 page

R8C/14 Group, R8C/15 Group

11. Interrupt

Rev.2.10

Jan 19, 2006

Page 76 of 253

REJ09B0164-0210

11.4

Address Match Interrupt

An address match interrupt request is generated immediately before executing the instruction at the

address indicated by the RMADi register (i=0, 1). This interrupt is used for a break function of the

debugger. When using the on-chip debugger, do not set an address match interrupt (the registers of

AIER, RMAD0, RMAD1 and the fixed vector tables) in a user system.

Set the starting address of any instruction in the RMADi register. The AIER0 and AIER1 bits in the

AIER0 register can select to enable or disable the interrupt. The I flag and IPL do not affect the address

match interrupt.

The value of the PC (Refer to 11.1.6.7 Saving a Register for the value of the PC) which is saved to the

stack when an address match interrupt is acknowledged varies depending on the instruction at the

address indicated by the RMADi register (The appropriate return address is not pushed on the stack).

When returning from the address match interrupt, return by one of the following:

• Change the content of the stack and use the REIT instruction.

• Use an instruction such as POP to restore the stack as it was before an interrupt request was

acknowledged. And then use a jump instruction.

Table 11.6 lists the Value of PC Saved to Stack when Address Match Interrupt is Acknowledged.

Figure 11.19 shows the AIER, RMAD0 to RMAD1 Registers.

NOTES:

1. Refer to the 11.1.6.7 Saving a Register for the PC value saved.

Table 11.6

Value of PC Saved to Stack when Address Match Interrupt is Acknowledged

Address Indicated by RMADi Register (i=0,1)

PC Value Saved(1)

• 16-bit operation code instruction

• Instruction shown below among 8-bit operation code instructions

ADD.B:S

#IMM8,dest

SUB.B:S

#IMM8,dest

AND.B:S

#IMM8,dest

OR.B:S

#IMM8,dest

MOV.B:S

#IMM8,dest

STZ.B:S

#IMM8,dest

STNZ.B:S

#IMM8,dest

STZX.B:S #IMM81,#IMM82,dest

CMP.B:S

#IMM8,dest

PUSHM

src

POPM

dest

JMPS

#IMM8

JSRS

#IMM8

MOV.B:S

#IMM,dest (However, dest = A0 or A1)

Address indicated by

RMADi register + 2

• Instructions other than the above

Address indicated by

RMADi register + 1

Table 11.7

Between Address Match Interrupt Sources and Associated Registers

Address Match Interrupt Factor

Address Match Interrupt Enable Bit Address Match Interrupt Register

Address Match Interrupt 0

AIER0

RMAD0

Address Match Interrupt 1

AIER1

RMAD1

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