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R8C/15 Datasheet(PDF) 82 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 82 Page - Renesas Technology Corp |
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82 / 277 page ![]() R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 70 of 253 REJ09B0164-0210 11.2.2 INT0 Input Filter The INT0 input contains a digital filter. The sampling clock is selected by the INT0F1 to INT0F0 bits in the INT0F register. The IR bit in the INT0IC register is set to “1” (interrupt requested) when the INT0 level is sampled for every sampling clock and the sampled input level matches three times. Figure 11.12 shows the Configuration of INT0 Input Filter. Figure 11.13 shows the Operating Example of INT0 Input Filter. Figure 11.12 Configuration of INT0 Input Filter Figure 11.13 Operating Example of INT0 Input Filter INT0F0, INT0F1 : Bits in INT0F register INT0EN, INT0PL : Bits in INTEN register =01b INT0 Port P4_5 Direction Register Sampling Clock Digital Filter (input level matches 3x) INT0 Interrupt =10b =11b f32 f8 f1 INT0F1 to INT0F0 INT0EN Other than INT0F1 to INT0F0 =00b =00b Both Edges Detection Circuit INT0PL=0 INT0PL=1 INT0 input Sampling timing IR bit in INT0IC register Set to “0” in program This is an operation example when the INT0F1 to INT0F0 bits in the INT0F register is set to “01b”, “10b”, or “11b” (passing digital filter). |
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