R8CSLASH15 datasheet(125/277 Pages) RENESAS

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R8C/14 Group, R8C/15 Group

13. Timers

Rev.2.10

Jan 19, 2006

Page 113 of 253

REJ09B0164-0210

Figure 13.21

TZMR and PUM Registers in Programmable Wait One-Shot Generation Mode

Timer Z Waveform Output Control Register

Symbol

Address

After Reset

PUM

0084h

00h

Bit Symbol

Bit Name

Function

INT0

_____

Pin One-shot Trigger

0 : INT0

_____

pin one-shot trigger disabled

Control Bit(1)

1 : INT0

_____

pin one-shot trigger enabled

INT0

_____

Pin One-shot Trigger

Polarity Select Bit(2)

NOTES :

b3 b2

INOSTG

b1 b0

—

(b4-b0)

0 : Outputs one-shot pulse “H”

Outputs “L” w hen the timer is stopped

1 : Outputs one-shot pulse “L”

Outputs “H” w hen the timer is stopped

b7 b6 b5 b4

INOSEG

TZOPL

0 : Falling edge trigger

1 : Rising edge trigger

Reserved Bit

Set to “0”

Timer Z Output Level Latch

Set the INOSTG bit to “1” after the INT0EN bit in the INTEN register and the INOSEG bit in the PUM

_____

pin one-shot trigger enabled), set the INT0F0 to

INT0F1 bits in the INT0F register. Set the INOSTG bit to “0” (INT0

_____

pin one-shot trigger disabled) after the

TZS bit in the TZMR register is set to “0” (count stop).

The INOSEG bit is enabled only w hen the INT0PL bit in the INTEN register is set to “0” (one edge).

Timer Z Mode Register

Symbol

Address

After Reset

TZMR

0080h

00h

Bit Symbol

Bit Name

Function

NOTES :

Set to “0”

Timer Z Operating Mode Bit b5 b4

1 1 : Programmable w ait one-shot generation mode

TZMOD0

Timer Z Count Start Flag(2)

0 : Stops counting

1 : Starts counting

—

(b3-b0)

Reserved Bit

TZMOD1

b7 b6 b5 b4

Refer to 20.4.3 Tim er Z for precautions on the TZS bit.

When the TZS bit is set to “1” (count start), The count value is w ritten to the reload register only. When the TZS bit is

set to “0” (count stop), The count value is w ritten to both reload register and counter.

TZWC

TZS

Timer Z Write Control Bit

Set to “1” in programmable w ait one-shot generation

mode(1)

b3 b2

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