R8CSLASH15 datasheet(197/277 Pages) RENESAS

197 / 277 page

R8C/14 Group, R8C/15 Group

17. Programmable I/O Ports

Rev.2.10

Jan 19, 2006

Page 185 of 253

REJ09B0164-0210

Figure 17.7

PUR0 and PUR1 Registers

Figure 17.8

DRR Register

Pull-Up Control Register 0

Symbol

A ddress

A f ter Reset

PUR0

00FCh

00XX0000b

Bit Symbol

Bit Name

Function

NOTES :

When this bit is set to “1” (pulled up), the pin w hose direct bit is set to “0” (input mode) is pulled up.

PU07

PU06

P1_4 to P1_7 pull-up(1)

PU02

—

(b5-b4)

PU03

b3 b2 b1

(b1-b0)

b7 b6 b5 b4

P1_0 to P1_3 pull-up(1)

Reserved Bit

P3_4 to P3_5 and P3_7 pll-up(1)

—

P3_3 pull-up(1)

0 : Not pulled up

1 : Pulled up

Nothing is assigned. When w rite, set to “0”.

When read, its content is indeterminate.

0 : Not pulled up

1 : Pulled up

Set to “0”

Pull-up Control Register 1

Symbol

Address

Af ter Reset

PUR1

00FDh

XXXXXX0Xb

Bit Symbol

Bit Name

Function

NOTES :

—

PU11

P4_5 pull-up(1)

0 : Not pulled up

1 : Pulled up

—

(b7-b2)

Nothing is assigned. When w rite, set to “0”.

When read, its content is indeterminate.

—

(b0)

Nothing is assigned. When w rite, set to “0”.

When read, its content is indeterminate.

b7 b6 b5 b4

—

When the PU11 bit is set to “1” (pulled up) and the PD4_5 bit is set to “0” (input mode), the P4_5 pin is

pulled up.

b3 b2 b1

Port P1 Drive Capacity Control Register

Symbol

Address

After Reset

DRR

00FEh

00h

Bit Symbol

Bit Name

Function

Set P1 N-channel output transistor drive

capacity

0 : Low

1 : High

Reserved Bit

(b7-b4)

P1_0 Drive Capacity

DRR3

P1_3 Drive Capacity

P1_2 Drive Capacity

DRR1

P1_1 Drive Capacity

b1 b0

b3 b2

DRR0

DRR2

Set to “0”

b7 b6 b5 b4

000

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