4501 datasheet(145/212 Pages) RENESAS

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2.3 Timers

2-28

Rev.2.01

Feb 07, 2005

4501 Group

APPLICATION

REJ09B0192-0201

Fig. 2.3.5 CNTR input setting example

However, specify the pulse width input to CNTR pin. Refer to section “2.3.4 Notes on use” for the timer

external input period condition.

b3b0

➀ Disable Interrupts

Timer 2 interrupt is temporarily disabled.

Interrupt enable flag INTE

Interrupt control register V1

“0”

✕✕

All interrupts disabled (DI instruction)

Timer 2 interrupt occurrence disabled

(TV1A instruction)

➁ Stop Timer Operation

Timer operation is temporarily stopped.

Timer 2 count source is selected.

Timer control register W2

Timer 2 stop (TW2A instruction)

CNTR input selected for count source

➂ Set Timer Value

Timer 2 count time is set.

Timer 2 reload register R2 “6316”

Timer count value 99 set (T2AB instruction)

Note when the interrupt request is cleared

When ➄ is executed, considering the skip of the next instruction according to the

interrupt request flag T2F, insert the NOP instruction after the SNZT2 instruction.

➅ Start Timer 2 Operation

Timer 2 temporarily stopped is restarted.

Timer 2 operation start (TW2A instruction)

Timer control register W2

✕ 1

b3b0

➆ Enable Interrupts

The timer 2 interrupt which is temporarily disabled is enabled.

Interrupt control register V1

“1”

Timer 2 interrupt occurrence enabled

(TV1A instruction)

All interrupts enabled (EI instruction)

✕✕

“✕”: it can be “0” or “1.”

Interrupt enable flag INTE

➄ Clear Interrupt Request

Timer 2 interrupt activated condition is cleared.

Timer 2 interrupt request flag T2F “0”

Timer 2 interrupt activated condition cleared

(SNZT2 instruction)

➃ Set port P12

P12/CNTR I/O port is set to input port.

Timer control register W6

Port P12 (I/O) set (TW6A instruction)

✕✕

Input mode is set. (OP1A instruction)

Output latch of port P12

b3b0

✕✕

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