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4501 Datasheet(PDF) 149 Page - Renesas Technology Corp

Part # 4501
Description  4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES
PDF  212 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

4501 Datasheet(HTML) 149 Page - Renesas Technology Corp

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2.3 Timers
2-32
Rev.2.01
Feb 07, 2005
4501 Group
APPLICATION
REJ09B0192-0201
(4)
Writing to the timer
Stop timer 1 or 2 counting and then execute the T1AB or T2AB instruction to write its data.
(5)
Writing to reload register R1
When writing data to reload register R1 while timer 1 is operating, avoid a timing when timer 1
underflow.
(6)
Timer 1 and timer 2 count start timing and count time when operation starts
Count starts from the first rising edge of the count source (2) after timer 1 and timer 2 operations
start (1).
Time to first underflow (3) is shorter (for up to 1 period of the count source) than time among next
underflow (4) by the timing to start the timer and count source operations after count starts.
When selecting CNTR input as the count source of timer 2, timer 2 operates synchronizing with the
falling edge of CNTR input.
Parameter
Timer external input period
(“H” and “L” pulse width)
Condition
High-speed mode
Middle-speed mode
Low-speed mode
Default mode
Min.
3/f(XIN)
6/f(XIN)
12/f(XIN)
24/f(XIN)
Unit
s
Typ.
Max.
Rating value
(7)
Watchdog timer
• The watchdog timer function is valid after system is released from reset. When not using the
watchdog timer function, execute the DWDT instruction and the WRST instruction continuously, and
clear the WEF flag to “0” to stop the watchdog timer function.
• The watchdog timer function is valid after system is returned from the RAM back-up. When not
using the watchdog timer function, execute the DWDT instruction and the WRST instruction continu-
ously every system is returned from the RAM back-up, and stop the watchdog timer function.
(8) Pulse width input to CNTR pin
Table 2.3.5 shows the recommended operating condition of pulse width input to CNTR pin.
Table 2.3.5 Recommended operating condition of pulse width input to CNTR pin
Fig. 2.3.9
Timer count start timing and count time when operation starts (T1, T2)
(1) Timer
Count Source
Timer Value
Timer Underflow
Signal
3
21
032
103
2
Count Source
(CNTR input)
(2)
(3)
(4)



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