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4501 Datasheet(PDF) 153 Page - Renesas Technology Corp |
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4501 Datasheet(HTML) 153 Page - Renesas Technology Corp |
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153 / 212 page ![]() 2.4 A/D converter 2-36 Rev.2.01 Feb 07, 2005 4501 Group APPLICATION REJ09B0192-0201 2.4.3 Notes on use (1) Note when the A/D conversion starts again When the A/D conversion starts again with the ADST instruction during A/D conversion, the previous input data is invalidated and the A/D conversion starts again. (2) A/D converter-1 Each analog input pin is equipped with a capacitor which is used to compare the analog voltage. Accordingly, when the analog voltage is input from the circuit with high-impedance and, charge/ discharge noise is generated and the sufficient A/D accuracy may not be obtained. Therefore, reduce the impedance or, connect a capacitor (0.01 µF to 1 µF) to analog input pins. Figure 2.4.3 shows the analog input external circuit example-1. When the overvoltage applied to the A/D conversion circuit may occur, connect an external circuit in order to keep the voltage within the rated range as shown the Figure 2.4.4. In addition, test the application products sufficiently. Fig. 2.4.3 Analog input external circuit example-1 (3) Notes for the use of A/D conversion 2 When the operating mode of the A/D converter is changed from the comparator mode to the A/D conversion mode with bit 3 of register Q1 in a program, be careful about the following notes. • Clear bit 2 of register V2 to “0” to change the operating mode of the A/D converter from the comparator mode to the A/D conversion mode with bit 3 of register Q1 (refer to Figure 2.4.5➀). • The A/D conversion completion flag (ADF) may be set when the operating mode of the A/D converter is changed from the comparator mode to the A/D conversion mode. Accordingly, set a value to bit 3 of register Q1, and execute the SNZAD instruction to clear the ADF flag. Do not change the operating mode (both A/D conversion mode and comparator mode) of A/D converter with bit 3 of register Q1 during operating the A/D converter. Fig. 2.4.4 Analog input external circuit example-2 Fig. 2.4.5 A/D converter operating mode program example • • • Clear bit 2 of register V2 to “0”.......➀ ↓ Change of the operating mode of the A/D converter from the comparator mode to the A/D conversion mode ↓ Clear the ADF flag to “0” with the SNZAD instruction ↓ Execute the NOP instruction for the case when a skip is performed with the SNZAD instruction • • • Sensor AIN (Note) Note: Apply the voltage within the specifications to an analog input pin. Sensor AIN About 1 k Ω |
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