4501 datasheet(156/212 Pages) RENESAS

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2-39

4501 Group

APPLICATION

Rev.2.01

Feb 07, 2005

REJ09B0192-0201

• Program counter (PC) ............................................................................................

Address 0 in page 0 is set to program counter.

• Interrupt enable flag (INTE) ...................................................................................

• Power down flag (P) ...............................................................................................

• External 0 interrupt request flag (EXF0) ................................................................

• Interrupt control register V1 ...................................................................................

• Interrupt control register V2 ...................................................................................

• Interrupt control register I1 ....................................................................................

• Timer 1 interrupt request flag (T1F) ......................................................................

• Timer 2 interrupt request flag (T2F) ......................................................................

• A/D conversion completion flag ADF .....................................................................

• Watchdog timer flags (WDF1, WDF2) ...................................................................

• Watchdog timer enable flag (WEF) .......................................................................

• Timer control register W1 ......................................................................................

• Timer control register W2 ......................................................................................

• Timer control register W6 ......................................................................................

• Clock control register MR ......................................................................................

• Key-on wakeup control register K0 .......................................................................

• Key-on wakeup control register K1 .......................................................................

• Key-on wakeup control register K2 .......................................................................

• Pull-up control register PU0 ...................................................................................

• Pull-up control register PU1 ...................................................................................

• Pull-up control register PU2 ...................................................................................

• A/D control register Q1 ..........................................................................................

• Carry flag (CY) .......................................................................................................

• Register A ..............................................................................................................

• Register B ..............................................................................................................

• Register D ..............................................................................................................

• Register E ..............................................................................................................

• Register X ..............................................................................................................

• Register Y ..............................................................................................................

• Register Z ...............................................................................................................

• Stack pointer (SP) ..................................................................................................

• Operation source clock ................................. On-chip oscillator (operation state)

• Ceramic resonator ........................................................................ Operation state

• RC oscillation circuit ............................................................................. Stop state

2.5.2 Internal state at reset

Figure 2.5.3 shows the internal state at reset. The contents of timers, registers, flags and RAM other than

shown in Figure 2.5.3 are undefined, so that set them to initial values.

Fig. 2.5.3 Internal state at reset

“✕” represents undefined.

2.5 Reset

000

0000

✕ ✕✕✕ ✕✕✕ ✕

(Interrupt disabled)

(Prescaler, timer 1 stopped)

(Timer 2 stopped)

✕✕ ✕

✕✕

4501 Datasheet(PDF) 156 Page - Renesas Technology Corp

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