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4501 Datasheet(PDF) 161 Page - Renesas Technology Corp

Part # 4501
Description  4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES
PDF  212 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

4501 Datasheet(HTML) 161 Page - Renesas Technology Corp

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2.7 RAM back-up
2-44
Rev.2.01
Feb 07, 2005
4501 Group
APPLICATION
REJ09B0192-0201
2.7.2 Related registers
(1)
Key-on wakeup control register K0
Register K0 controls the ON/OFF of the key-on wakeup function of ports P00–P03.
Set the contents of this register through register A with the TK0A instruction.
The contents of register K0 is transferred to register A with the TAK0 instruction.
Table 2.7.4 shows the key-on wakeup control register K0.
Table 2.7.4 Key-on wakeup control register K0
Key-on wakeup control register K0
at reset : 00002
at RAM back-up : state retained
R/W
Key-on wakeup invalid
Key-on wakeup valid
Key-on wakeup invalid
Key-on wakeup valid
Key-on wakeup invalid
Key-on wakeup valid
Key-on wakeup invalid
Key-on wakeup valid
Port P03
key-on wakeup control bit
Port P02
key-on wakeup control bit
Port P01
key-on wakeup control bit
Port P00
key-on wakeup control bit
0
1
0
1
0
1
0
1
K03
K02
K01
K00
Note: “R” represents read enabled, and “W” represents write enabled.
(2)
Key-on wakeup control register K1
Register K1 controls the ON/OFF of the key-on wakeup function of ports P10–P13.
Set the contents of this register through register A with the TK1A instruction.
The contents of register K1 is transferred to register A with the TAK1 instruction.
Table 2.7.5 shows the key-on wakeup control register K1.
Table 2.7.5 Key-on wakeup control register K1
Key-on wakeup control register K1
at reset : 00002
at RAM back-up : state retained
R/W
P13 key-on wakeup invalid/INT pin key-on wakeup valid
P13 key-on wakeup valid/INT pin key-on wakeup invalid
Key-on wakeup invalid
Key-on wakeup valid
Key-on wakeup invalid
Key-on wakeup valid
Key-on wakeup invalid
Key-on wakeup valid
Port P13/INT
key-on wakeup control bit
Port P12/CNTR
key-on wakeup control bit
Port P11
key-on wakeup control bit
Port P10
key-on wakeup control bit
0
1
0
1
0
1
0
1
K13
K12
K11
K10
Note: “R” represents read enabled, and “W” represents write enabled.



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