PCM5310PAP datasheet(61/103 Pages) TI

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Registers 50 and 51 (32h and 33h)

PCM5310

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ZR12: Zero Flag Reverse

This bit reverses the polarity of the zero flag output. The zero flag goes from low to high after the digital input

data are continuously zero during 1024 fS when ZR12 = '0'. The zero flag can output from the GPIO pins by

setting Registers 9 to 11 (GSL1[4:0], GSL2[4:0], GSL3[4:0]).

Default value: 0

Buffered output (default)

Inverted output

REG

HEX

DESCRIPTION

32h

Digital attenuation and mute control for DAC34

D34E

RSV

DUC4

DUC3

RSV

DZ34

33h

Digital gain boost and digital soft mute for DAC34

RSV

DB34[1:0]

DMU4

DMU3

D34E: Digital Attenuation and Mute Update Control Enable for DAC34

DUC4: Digital Attenuation and Mute Setting Update for DAC34, R-Channel

DUC3: Digital Attenuation and Mute Setting Update for DAC34, L-Channel

The digital attenuation and mute levels of DAC34 can be changed independently to any level by setting bits

DMU4 and DMU3 in Register 51, bits DAT3[7:0] in Register 52, and bits DAT4[7:0] in Register 53 when D34E =

'0'. When D34E = '1', the level is changed to any level at the same time when DUC4 = '1' or DUC3 = '1'. Both bits

are automatically set to '0' after they are set to '1'. DUC4 and DUC3 must be set to '1' for every volume level

setting while D34E = '1'.

Default value of D34E: 1. Default value of DUC4 and DUC3: 0

D34E = 0

Digital attenuation and mute update control disabled

D34E = 1

Digital attenuation and mute update control enabled (default)

DUC4, DUC3 = 0

No update level (default)

DUC4, DUC3 = 1

Update level (set to '0' automatically after setting to '1')

DZ34: Digital Attenuation and Mute Zero Cross Enable for DAC34

This bit enables zero-crossing detection, which reduces zipper noise while the DAC digital attenuator and mute

settings are being changed. If no zero-crossing data are input for a 512/fS period (10.6 ms at a 48-kHz sampling

rate), then a timeout occurs and the PCM5310 volume level changes. Zero-crossing detection cannot be used

with continuous zero and dc data.

Default value: 1

Disable

Enable (default)

DB34[1:0]: Digital Gain Boost for DAC34

These bits are used to boost the gain of digital data input to the DACs in front of the digital attenuator.

Default value: 00

0 dB (default)

6 dB

12 dB

18 dB

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