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PCM5310PAP Datasheet(PDF) 22 Page - Texas Instruments

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Part # PCM5310PAP
Description  24-Bit, 96-/192-kHz, Asynchronous, 4-Channel/4-Channel Audio Codec with 2-VRMS Driver, Headphone Driver, and 6 Audio Interface Ports
PDF  103 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCM5310PAP Datasheet(HTML) 22 Page - Texas Instruments

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POWER-SUPPLY SEQUENCE AND POWER ON/OFF SEQUENCE
VDD,VCCP,
VCCAD,VCCDA
VCCH(9V)
I CRegisterSetting
2
AnalogOutput
(1)
DigitalOutput
75msto2000ms
(2)
37.5msto1000ms
Halfof
Power-Supply
Voltage
Recommended
Power-On
Sequence
Recommended
Power-Off
Sequence
PCM5310
SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com
In order to reduce audible pop noise, a register setting sequence is required after turning on all power supplies
and before turning off all power supplies. Any modules that are not used in the application or system should be
powered down after the recommended power-on sequence. Before the power-off sequence, all modules should
be in a power-on state. The recommended power-supply sequence is shown in Figure 32. The recommended
register settings are shown in Table 8 and Table 9.
(1)
Ramp up/down time for the analog output can be changed through the register setting (see Register 18, PDTM[2:0]).
(2)
A 1.0-
µF capacitor should be connected to the VCOMAD and VCOMDA pins.
Figure 32. Recommended Power On/Off Sequence
Table 8. Recommended Register Settings When Powered On
REGISTER SETTING
STEP
ADDRESS
DATA
DESCRIPTION
1
—
—
Turn on all power supplies
2
11
00
Analog bias power up
3
1F
49
Headphone output L-channel mute disable and level (–42 dB) setting(1)
4
20
49
Headphone output R-channel mute disable and level (–42 dB) setting(1)
5
1E
B0
Headphone volume update control
6
1B
00
Line output gain (0 dB) control from DAC(1)
7
1C
00
Line output 2 VRMS and 2.4 VRMS mode select
8
2A
FF
DAC12 L-channel digital attenuation level (0 dB) setting(1)
9
2B
FF
DAC12 R-channel digital attenuation level (0 dB) setting(1)
10
29
00
DAC12 digital mute setting and digital gain boost
11
28
B1
DAC12 digital attenuation/mute control and zero crossing enable
12
34
FF
DAC34 L-channel digital attenuation level (0 dB) setting(1)
13
35
FF
DAC34 R-channel digital attenuation level (0 dB) setting(1)
14
33
00
DAC34 digital mute setting and digital gain (0 dB) boost
15
32
B1
DAC34 digital attenuation/mute control and zero crossing enable
16
52
D5
ADC12 L-channel digital attenuation level (0 dB) setting(1)
17
53
D5
ADC12 R-channel digital attenuation level (0 dB) setting(1)
(1)
Any level is acceptable for volume, gain, and attenuation. The level should be resumed by register data recorded when the system
powers off.
22
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): PCM5310



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