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PCM5310PAP Datasheet(PDF) 30 Page - Texas Instruments |
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PCM5310PAP Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 103 page ![]() ADC AND FILTER ADC-1L PGA-AD1L Decimation Filter HPF ATT MUTE ADC-1R PGA-AD1R Decimation Filter HPF ATT MUTE ADC-2L PGA-AD2L Decimation Filter HPF ATT MUTE ADC-2R PGA-AD2R Decimation Filter HPF ATT MUTE PCM5310 SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com The analog-to-digital converter (ADC) and digital filter include a delta-sigma modulator, decimation filter, high-pass filter (HPF), digital gain control, digital attenuation control, and digital soft mute, as shown in Figure 37. The HPF eliminates dc offset of the ADC analog section with 0.91 Hz as the cutoff frequency at a 48-kHz sampling rate. The digital gain or attenuation control can be adjusted from 20 dB to –100 dB in 0.5-dB steps. The descriptions for the ADC and filter registers are shown in Table 14. Figure 37. ADCs and Filters Table 14. ADC and Filter Registers REGISTER DESCRIPTION REGISTER NUMBER REGISTER BITS Digital attenuation and gain update control for ADC12 80 A12E, AUC2, AUC1, AZ12 Digital soft mute setting for ADC12 81 AMU2, AMU1 Digital attenuation and gain level setting for ADC12 82, 83 AAT2[7:0], AAT1[7:0] High-pass filter disable for ADC12 84 HF12 Digital attenuation and gain update control for ADC34 90 A34E, AUC4, AUC3, AZ34 Digital soft mute setting for ADC34 91 AMU4, AMU3 Digital attenuation and gain level setting for ADC34 92, 93 AAT4[7:0], AAT3[7:0] High-pass filter disable for ADC34 94 HF34 30 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): PCM5310 |
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