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PCM5310PAP Datasheet(PDF) 66 Page - Texas Instruments |
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PCM5310PAP Datasheet(HTML) 66 Page - Texas Instruments |
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66 / 103 page  Registers 80 and 81 (50h and 51h) PCM5310 SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com REG HEX DESCRIPTION B7 B6 B5 B4 B3 B2 B1 B0 80 50h Digital attenuation and mute control for ADC12 A12E RSV AUC2 AUC1 RSV RSV RSV AZ12 81 51h Digital soft mute for ADC12 RSV FS12 RSV RSV RSV RSV AMU2 AMU1 A12E: Digital Attenuation and Mute Update Control Enable for ADC12 AUC2: Digital Attenuation and Mute Setting Update for ADC12, R-Channel AUC1: Digital Attenuation and Mute Setting Update for ADC12, L-Channel The digital attenuation and mute levels of ADC12 can be changed independently to any level by setting bits AMU2 and AMU1 in Register 81, bits AAT1[7:0] in Register 82, and bits AAT2[7:0] in Register 83 when A12E = '0'. When A12E = '1', the level is changed to any level at the same time when AUC2 = '1' or AUC1 = '1'. Both bits are automatically set to '0' after they are set to '1'. AUC2 and AUC1 must be set to '1' for every volume level setting while A12E = '1'. Default value of A12E: 1. Default value of AUC2 and AUC1: 0 A12E = 0 Digital attenuation and mute update control disabled A12E = 1 Digital attenuation and mute update control enabled (default) AUC2, AUC1 = 0 No update level (default) AUC2, AUC1 = 1 Update level (set to '1' automatically after setting to '0') AZ12: Digital Attenuation and Mute Zero Crossing Enable for ADC12 This bit enables zero-crossing detection, which reduces zipper noise while the ADC digital attenuator and mute settings are being changed. If no zero-crossing data are input for a 512/fS period (10.6 ms at a 48-kHz sampling rate), then a timeout occurs and the PCM5310 volume level changes. Zero-crossing detection cannot be used with continuous zero and dc data. Default value: 1 0 Disable 1 Enable (default) FS12: Sampling Rate Selection for ADC12 This bit is used to select the ADS12 sampling rate. FS12 must be set to '1' when the sampling rate is greater than 48 kHz. Default value: 0 0 fS ≤ 48 kHz (default) 1 fS > 48 kHz AMU2: Digital Mute Control for ADC12, R-Channel AMU1: Digital Mute Control for ADC12, L-Channel The PCM5310 can independently mute the DAC digital input data to a zero level when AMU2 and AMU1 = '1'. These settings take precedence over the attenuation level settings of bits AAT1[7:0] and AAT2[7:0] in registers 82 and 83. The analog outputs may have audible zipper noise while changing levels. This noise can be reduced by selecting zero-crossing detection (Register 80, AZ12). Default value: 0 0 Mute disabled (default) 1 Mute enabled 66 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): PCM5310 |
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