ATtiny48 datasheet(117/266 Pages) ATMEL

117 / 266 page

117

8008C–AVR–03/09

ATtiny48/88

When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden

according to Table 14-1 on page 117. For more details on automatic port overrides, refer to

“Alternate Port Functions” on page 60.

Note:

See “Alternate Functions of Port B” on page 64 for a detailed description of how to define the

direction of the user defined SPI pins.

The following code examples show how to initialize the SPI as a Master and how to perform a

simple transmission. DDR_SPI in the examples must be replaced by the actual Data Direction

actual data direction bits for these pins. E.g. if MOSI is placed on pin PB5, replace DD_MOSI

with DDB5 and DDR_SPI with DDRB.

Note:

1. See ”About Code Examples” on page 7.

Table 14-1.

SPI Pin Overrides

(Note:)

Direction, Master SPI

Direction, Slave SPI

MOSI

User Defined

Input

MISO

Input

User Defined

SCK

User Defined

Input

User Defined

Input

Assembly Code Example

(1)

SPI_MasterInit:

; Set MOSI and SCK output, all others input

ldi

r17,(1<<DD_MOSI)|(1<<DD_SCK)

out

DDR_SPI,r17

; Enable SPI, Master, set clock rate fck/16

ldi

r17,(1<<SPE)|(1<<MSTR)|(1<<SPR0)

out

SPCR,r17

ret

SPI_MasterTransmit:

; Start transmission of data (r16)

out

SPDR,r16

Wait_Transmit:

; Wait for transmission complete

sbis

SPSR,SPIF

rjmp

Wait_Transmit

ret

ATtiny48 Datasheet(PDF) 117 Page - ATMEL Corporation

ATtiny48 Datasheet(HTML) 117 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL