ATtiny48 datasheet(188/266 Pages) ATMEL

188 / 266 page

188

8008C–AVR–03/09

ATtiny48/88

Note:

VCC - 0.3V < AVCC < VCC + 0.3V, however, AVCC should always be within 4.5 – 5.5V

The XA1/XA0 pins determine the action executed when the CLKI pin is given a positive pulse.

The bit coding is shown in Table 20-11.

Table 20-9.

Pin Name Mapping

Signal Name in

Programming Mode

Pin Name

I/O

Function

RDY/BSY

PD1

0: Device is busy programming, 1: Device is

ready for new command

PD2

Output Enable (Active low)

PD3

Write Pulse (Active low)

BS1

PD4

Byte Select 1 (“0” selects Low byte, “1” selects

High byte)

XA0

PD5

XTAL Action Bit 0

XA1

PD6

XTAL Action Bit 1

PAGEL

PD7

Program memory and EEPROM Data Page

Load

BS2

PC2

Byte Select 2 (“0” selects Low byte, “1” selects

2’nd High byte)

DATA

{PC[1:0]: PB[5:0]}

I/O

Bi-directional Data bus (Output when OE is low)

Table 20-10. Pin Values Used to Enter Programming Mode

Symbol

Value

PAGEL

Prog_enable[3]

XA1

Prog_enable[2]

XA0

Prog_enable[1]

BS1

Prog_enable[0]

Table 20-11. XA1 and XA0 Coding

XA1

XA0

Action when CLKI is Pulsed

Load Flash or EEPROM Address (High or low address byte determined by BS1).

Load Data (High or Low data byte for Flash determined by BS1).

Load Command

No Action, Idle

ATtiny48 Datasheet(PDF) 188 Page - ATMEL Corporation

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