ATtiny48 datasheet(184/266 Pages) ATMEL

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184

8008C–AVR–03/09

ATtiny48/88

20. Memory Programming

20.1

Program And Data Memory Lock Bits

The ATtiny48/88 provides two Lock bits which can be left unprogrammed (“1”) or can be pro-

grammed (“0”) to obtain the additional features listed in Table 20-2. The Lock bits can only be

erased to “1” with the Chip Erase command. The ATtiny48/88 has no separate Boot Loader sec-

tion. The SPM instruction is enabled for the whole Flash if the SELFPRGEN fuse is programmed

(“0”), otherwise it is disabled.

Notes:

1. “1” means unprogrammed, “0” means programmed.

Notes:

1. Program the Fuse bits before programming the LB1 and LB2.

2. “1” means unprogrammed, “0” means programmed

20.2

Fuse Bits

The ATtiny48/88 has three Fuse bytes. Table 20-3 – Table 20-5 describe briefly the functionality

of all the fuses and how they are mapped into the Fuse bytes. Note that the fuses are read as

logical zero, “0”, if they are programmed.

Table 20-1.

Lock Bit Byte

(1)

Lock Bit Byte

Bit No

Description

Default Value

–

1 (unprogrammed)

–

1 (unprogrammed)

–

1 (unprogrammed)

–

1 (unprogrammed)

–

1 (unprogrammed)

–

1 (unprogrammed)

LB2

Lock bit

1 (unprogrammed)

LB1

Lock bit

1 (unprogrammed)

Table 20-2.

Lock Bit Protection Modes

(1)(2)

Memory Lock Bits

Protection Type

LB Mode

LB2

LB1

No memory lock features enabled.

Further programming of the Flash and EEPROM is disabled in

Parallel and Serial Programming mode. The Fuse bits are

locked in both Serial and Parallel Programming mode.(1)

Further programming and verification of the Flash and EEPROM

is disabled in Parallel and Serial Programming mode. The Fuse

bits are locked in both Serial and Parallel Programming mode.(1)

Table 20-3.

Fuse Extended Byte

Bit No

Description

Default Value

–7

–

–6

–

–5

–

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