ATtiny48 datasheet(202/266 Pages) ATMEL

202 / 266 page

202

8008C–AVR–03/09

ATtiny48/88

Notes:

1. All DC Characteristics contained in this data sheet are based on simulation and characterization of other AVR microcon-

trollers manufactured in the same process technology. These values are preliminary, representing design targets, and will be

updated after characterization of actual silicon.

2. “Max” means the highest value where the pin is guaranteed to be read as low

3. These parameters are not tested in production.

4. “Min” means the lowest value where the pin is guaranteed to be read as high

5. Although each I/O port can sink more than the test conditions (10 mA at V

CC = 5V, 5 mA at VCC = 3V, 2 mA at VCC = 1.8V)

under steady state conditions (non-transient), the following must be observed:

• The sum of all IOL, for ports A0, A3, B0 – B7, C7, D5 – D7 should not exceed TBD mA.

• The sum of all I

OL, for ports A1 – A2, C0 – C6, D0 – D4 should not exceed TBD mA.

If I

OL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater

than the listed test condition.

6. The RESET pin must tolerate high voltages when entering and operating in programming modes and, as a consequence,

has a weak drive strength as compared to regular I/O pins. See Figure 22-28, Figure 22-29, Figure 22-30, Figure 22-31, Fig-

ure 22-32 and Figure 22-33 (starting on page 229).

7. High Sink I/O pins are PD0, PD1, PD2 and PD3.

8. Although each I/O port can source more than the test conditions (10 mA at V

CC = 5V, 5mA at VCC = 3V, 2 mA at VCC = 1.8V)

under steady state conditions (non-transient), the following must be observed:

• The sum of all I

OH, for ports A2 – A3, B0 – B7, C6, D0 – D7 should not exceed TBD mA.

• The sum of all I

OH, for ports A0 – A1, C0 – C5, C7 should not exceed TBD mA.

If IIOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current

greater than the listed test condition.

9. These are test limits, which account for leakage currents of the test environment. Actual device leakage currents are lower.

10. Measured with all I/O modules turned off (PRR = 0xFF).

11. Measured with Brown-Out Detection (BOD) disabled.

ILIL

Input Leakage

Current I/O Pin

CC = 5.5V, pin low

(absolute value)

<0.05

1 (9)

µA

ILIH

Input Leakage

Current I/O Pin

VCC = 5.5V, pin high

(absolute value)

<0.05

1 (9)

µA

RPU

Pull-up Resistor, I/O Pin

VCC = 5.5V, input low

Pull-up Resistor, Reset Pin

VCC = 5.5V, input low

ICC

Supply Current,

Active Mode (10)

f = 1MHz, VCC = 2V

0.2

0.4

f = 4MHz, VCC = 3V

1.4

2.5

f = 8MHz, VCC = 5V

4.5

Supply Current,

Idle Mode

f = 1MHz, VCC = 2V

0.03

0.1

f = 4MHz, VCC = 3V

0.25

0.6

f = 8MHz, VCC = 5V

Supply Current,

Power-Down Mode (11)

WDT enabled, VCC = 3V

µA

WDT disabled, VCC = 3V

< 0.2

µA

A = -40°C to 85°C, VCC = 1.8V to 5.5V (unless otherwise noted)

(1) (Continued)

Symbol

Parameter

Condition

Min

Typ

Max

Units

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