MAC7200 datasheet(332/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

254

Freescale Semiconductor

13.2.2.11 AXBS Address Map Register (AAMR)

For certain designs, the static decoding of the upper bits of the AMBA-AHB address bus to steer requests

to the appropriate crossbar switch slave may not be sufficient. For those designs, the AAMR provides an

optional register which implements additional capability for AXBS request steering. This register provides

a program-visible address steering mechanism by supporting the mapping of any 512 MByte address space

to any of the AXBS slave connections.

The AAMR is divided into eight 4-bit fields providing an enable bit and a 3-bit slave number. Thus, the

upper 3 bits of the AMBA-AHB address (HADDR[31:29]) are used to index into the AAMR to select a

corresponding 3-bit vector which defines the targeted AXBS slave.

The AAMR is initially loaded at reset with a 32-bit value provided as an input. For subsequent writes to

the AAMR, the hardware invokes the following synchronization mechanism:

1. The 32-bit IPS write to the AAMR loads the pending address map operand into a temporary

2. The pending AAMR write causes the MCM to assert a control signal which forces the AXBS into

a “halted” state.

3. The IPS write cycle is terminated normally.

4. Once the AXBS module indicates it has stalled all bus master transactions and entered the halted

state, then MCM loads the pending address map operand into the AAMR, effectively enabling the

new mapping.

5. MCM then releases the halt request signal to the AXBS, allowing it to resume operation with the

just-loaded address map.

The device is guaranteed to function properly after changing the value of the AAMR if the write to the

processor pipeline.

The AAMR can only be written in its entirety, i.e., only 32-bit writes are supported. Any attempted write

of a smaller data size (e.g., 8- or 16-bit value) generates an error response. See Figure 13-11 and

Table 13-11 for the AXBS Address Map Register definition.

EA7

A7Slave

EA6

A6Slave

EA5

A5Slave

EA4

A4Slave

Reset

111

00000000000

9876543210

EA3

A3Slave

EA2

A2Slave

EA1

A1Slave

EA0

A0Slave

Reset

00001011

aamr_init[7:0]

Figure 13-11. AXBS Address Map (AAMR) Register

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