MAC7200 datasheet(336/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

258

Freescale Semiconductor

13.2.2.14.2

Peripheral Power Management Clear Register (PPMRC)

The PPMRC register provides a simple memory-mapped mechanism to clear a given bit in the

PPMR{H,L} registers to enable the clock for a given IPS module without the need to perform a

read-modify-write on the PPMR. The data value on a register write causes the corresponding bit in the

PPMR{H,L} register to be cleared. A data value of 64 to 127 provides a global clear function, forcing the

entire contents of the PPMR{H,L} to be zeroed, enabling all IPS module clocks. In the event on

simultaneous writes of the PPMRS and PPMRC, the write to the PPMRC takes priority. Reads of this

65432

0000

PPMRS[6:0]

Reset

—

0000

Figure 13-15. Peripheral Power Management Set (PPMRS) Register

Table 13-14. Peripheral Power Management Set (PPMRS) Field Descriptions

Field

Description

Reserved, should be cleared.

6–0

PPMRS[6:0]

Set Module Clock Disable.

0-63

Set corresponding bit in PPMR{H,L}, disabling the module clock.

64-127 Set all bits in PPMR{H,L}, disabling all the module clocks.

65432

0000

PPMRC[6:0]

Reset

—

0000

Figure 13-16. Peripheral Power Management Clear (PPMRC) Register

Table 13-15. Peripheral Power Management Clear (PPMRC) Field Descriptions

Field

Description

Reserved, should be cleared.

6–0

PPMRC[6:0]

Clear Module Clock Disable.

0-63

Clear corresponding bit in PPMR{H,L}, enabling the module clock.

64-127 Clear all bits in PPMR{H,L}, enabling all the module clocks.

MAC7200 Datasheet(PDF) 336 Page - Freescale Semiconductor, Inc

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