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MAC7200 Datasheet(PDF) 349 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 349 Page - Freescale Semiconductor, Inc |
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349 / 976 page ![]() Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 271 13.2.2.15.6 Flash ECC Attributes Register (FEAT) The FEAT is an 8-bit register for capturing the AXBS bus master attributes of the last, properly-enabled ECC event in the flash memory. Depending on the state of the ECC Configuration Register, an ECC event in the flash causes the address, attributes and data associated with the access to be loaded into the FEAR, FEMR, FEAT and FEDR registers, and the appropriate flag (F1BC or FNCE) in the ECC Status Register to be asserted. This register can only be read from the IPS programming model; any attempted write is ignored. See Figure 13-28 and Table 13-25 for the Flash ECC Attributes Register definition. Register address: MCM Base + 0x57 765 43210 R Write Size[2:0] Protection[3:0] W Reset ———————— Figure 13-28. Flash ECC Attributes (FEAT) Register Table 13-25. PFEAT Field Descriptions Field Description 7 Write AMBA-AHB HWRITE. 0 AMBA-AHB read access 1 AMBA-AHB write access 6–4 Size[2:0] AMBA-AHB HSIZE[2:0]. 000 8-bit AMBA-AHB access 001 16-bit AMBA-AHB access 010 32-bit AMBA-AHB access 011 Reserved 1xx Reserved 3–0 Protection[3:0] AMBA-AHB HPROT[3:0]. Protection[3]: Cacheable 0 Non-cacheable 1 Cacheable Protection[2]: Bufferable 0 Non-bufferable 1Bufferable Protection[1]: Mode 0 User mode 1 Supervisor mode Protection[0]: Type 0I-Fetch 1 Data |
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