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MAC7200 Datasheet(PDF) 464 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 464 Page - Freescale Semiconductor, Inc |
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464 / 976 page ![]() Platform RAM Array Controller (PRAM_CTL) MAC7200 Microcontroller Family Reference Manual, Rev. 2 386 Freescale Semiconductor Figure 19-3. Block Diagram: 39-bit ECC Decode The encoder logic is included in the write data path to the RAM and generates the 7-bit ECC code which is written to the RAM with the data. Together, the data bus and ECC bits are called the code word. Six of the ECC bits are calculated using a modified Hamming code. The seventh and final ECC bit is calculated so that the parity of the entire code word is odd. Again, this process is done twice in parallel for the 64-bit implementation. The decoder logic is included in the read data path from the RAM back to the AHB bus. The decoder uses the same algorithm as the encoder and generates 6 unique ECC bits, or the syndrome[5:0], from the 39-bit code word (7 ECC and 32 data bits). This syndrome is used to determine which bit within the 39-bit data bus caused the single-bit correctable error. See Chapter 13, “Miscellaneous Control Module (MCM)” for more detail on which syndromes map to which bits. A seventh ECC bit representing the overall parity of the entire code word is also generated. Table 19-6 shows the relationship of the overall parity bit, the syndrome and error detection and correction. Odd parity is shown as a value of 1. In this table, the term "valid codeword" refers to the codewords defined in Table 19-11. All other codewords are "invalid." It is important to note that the first entry in this table, overall even parity and a syndrome of zero, could be generated by the failure of the either the 7th ECC bit or the entire 39 bits of data. For this reason, an odd parity scheme was chosen for the 7th ECC bit, and a check is performed to generate a mulitple bit error when the entire 39-bit codeword is zero. Table 19-6. Parity vs. Syndrome Overall Parity Syndrome[5:0] Result 0 0 single-bit correction 0 valid codeword single-bit correction 0 invalid codeword multiple-bit error 1 non-zero multiple-bit error 1 0 no error dec_bus_out[31:0] ecc_syndrome[5:0] ecc_parity ecc_single_detect ecc_multiple_detect pram_rdata[39:0] 39 bit codeword 32 data bits Bit Correction Muxing Syndrome Decode |
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