MAC7200 datasheet(499/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

421

23.3.2.5

CRG Interrupt Enable Register (CRGINT)

This register enables CRG interrupt requests.

23.3.2.6

CRG Clock Select Register (CLKSEL)

This register controls CRG clock selection. Refer to Figure 23-13 for more details on the effect of each bit.

SCMIF

Self clock mode interrupt flag. SCMIF is set to 1 when the SCM status bit changes. This flag can only be

cleared by writing a 1. Writing a 0 has no effect. If enabled (SCMIE=1), SCMIF causes an interrupt

request.

0 No change in SCM bit

1 SCM bit has changed

SCM

Self clock mode status bit. SCM reflects the current clocking mode. Writes have no effect.

0 MCU is operating normally with OSCCLK available

1 MCU is operating in Self Clock Mode with OSCCLK in an unknown state. All clocks are derived from

PLLCLK running at its minimum frequency fSCM

Address: Base + $_04

Access: User read/write

Read: anytime

Write: anytime

76543210

000

LOCKIE

SCMIE

Reset

00000000

Figure 23-7. CRG Interrupt Enable Register (CRGINT)

Table 23-5. CRGINT Field Descriptions

Field

Description

7–5

Reserved, should be cleared.

LOCKIE

Lock interrupt enable bit.

0 LOCK interrupt requests are disabled

1 Interrupt will be requested whenever LOCKIF is set

3–2

Reserved, should be cleared.

SCMIE

Self clock mode interrupt enable bit.

0 SCM interrupt requests are disabled

1 Interrupt will be requested whenever SCMIF is set

Reserved, should be cleared.

Table 23-4. CRGFLG Field Descriptions (Continued)

Field

Description

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