MAC7200 datasheet(500/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

422

Freescale Semiconductor

23.3.2.7

CRG PLL Control Register (PLLCTL)

This register controls the PLL functionality.

Address: Base + $_05

Access: User read/write

Read: anytime

Write: refer to each bit for individual write conditions

76543210

PLLSEL

000

PLLDOZE

RTIDOZE

SWTDOZE

Reset

00000000

Figure 23-8. CRG Clock Select Register (CLKSEL)

Table 23-6. CLKSEL Field Descriptions

Field

Description

PLLSEL

PLL select bit. Write anytime. Writing a 1 when LOCK=0 and AUTO=1, or TRACK=0 and AUTO=0 has no

effect This prevents the selection of an unstable PLLCLK as SYSCLK. The PLLSEL bit is cleared when

the MCU enters Self Clock Mode or Doze Mode with the PLLDOZE bit set.

0 System clocks are derived from OSCCLK (System Clock = OSCCLK)

1 System clocks are derived from PLLCLK (System Clock = PLLCLK)

6–4

Reserved, should be cleared.

PLLDOZE

PLL stops in doze mode bit. Write: anytime. If PLLDOZE is set, the CRG will clear the PLLSEL bit before

entering Doze Mode. The PLLON bit remains set during Doze Mode, but the PLL is powered down. Upon

exiting Doze Mode, the PLLSEL bit must be set manually if PLL clock is required. While the PLLDOZE bit

is set, the AUTO bit is set to 1 in order to allow the PLL to lock automatically on to the selected target

frequency after exiting Doze Mode.

0 PLL keeps running in Doze Mode.

1 PLL stops in Doze Mode.

Reserved, should be cleared.

RTIDOZE

RTI stops in doze mode bit. Write: anytime

0 RTI keeps running in Doze Mode

1 RTI stops and initializes the RTI dividers whenever the part goes into Doze Mode

SWTDOZE

SWT stops in doze mode bit. Normal modes: Write once. Special modes: Write anytime

0 SWT keeps running in Doze Mode

1 SWT stops and initializes the SWT dividers whenever the part goes into Doze Mode

Address: Base + $_06

Access: User read/write

Read: anytime

Write: refer to each bit for individual write conditions

76543210

CME

PLLON

AUTO

ACQ

000

CMRD

Reset

11110001

Figure 23-9. CRG PLL Control Register (PLLCTL)

MAC7200 Datasheet(PDF) 500 Page - Freescale Semiconductor, Inc

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