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MAC7200 Datasheet(PDF) 592 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 592 Page - Freescale Semiconductor, Inc

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The Generic FlexCAN2 Module
MAC7200 Microcontroller Family Reference Manual, Rev. 2
514
Freescale Semiconductor
28.2.6.3
Register Descriptions
The FlexCAN registers are described in this section in ascending address order.
28.2.6.3.1
Module Configuration Register (MCR)
This register defines global system configurations, such as the module operation mode (e.g., low power)
and maximum message buffer configuration. Most of the fields in this register can be accessed at any time,
except the MAXMB field, which should only be changed while the module is in Freeze Mode.
0
1010
1010
Transmit a data frame whenever a remote request frame with the same ID
is received. This MB participates simultaneously in both the matching and
arbitration processes. The matching process compares the ID of the
incoming remote request frame with the ID of the MB. If a match occurs
this MB is allowed to participate in the current arbitration process and the
Code field is automatically updated to ‘1110’ to allow the MB to participate
in future arbitration runs. When the frame is eventually transmitted
successfully, the Code automatically returns to ‘1010’ to restart the
process again.
0
1110
1010
This is an intermediate code that is automatically written to the MB by the
MBM as a result of match to a remote request frame. The data frame will
be transmitted unconditionally once and then the code will automatically
return to ‘1010’. The CPU can also write this code with the same effect.
Address: Base + $0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
MDIS
FRZ
0
HALT
SUPV
DOZE
BCC
W
Reset
–1
101100
–2
100
–3
000
0
15
14
13
12
11
10
9876543
2
1
0
R
0000000000
MAXMB
W
Reset
0000000000001
1
1
1
1 Reset value of this bit is different on various platforms. Consult the specific MCU documentation to determine its
value.
2 Different on various platforms, but it is always the opposite of the MDIS reset value.
3 Different on various platforms, but it is always the same as the MDIS reset value.
Figure 28-3. Module Configuration Register (MCR)
Table 28-8. Message Buffer Code for Tx buffers
RTR
Initial Tx code
Code after
successful
transmission
Description



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