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MAC7200 Datasheet(PDF) 598 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 598 Page - Freescale Semiconductor, Inc

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The Generic FlexCAN2 Module
MAC7200 Microcontroller Family Reference Manual, Rev. 2
520
Freescale Semiconductor
28.2.6.3.3
Free Running Timer (TIMER)
This register represents a 16-bit free running counter that can be read and written by the CPU. The timer
starts from $0000 after Reset, counts linearly to $FFFF, and wraps around.
The timer is clocked by the FlexCAN bit-clock (which defines the baud rate on the CAN bus). During a
message transmission/reception, it increments by one for each bit that is received or transmitted. When
there is no message on the bus, it counts using the previously programmed baud rate. During Freeze Mode,
the timer is not incremented.
The timer value is captured at the beginning of the identifier field of any frame on the CAN bus. This
captured value is written into the Time Stamp entry in a message buffer after a successful reception or
transmission of a message.
Writing to the timer is an indirect operation. The data is first written to an auxiliary register and then an
internal request/acknowledge procedure across clock domains is executed. All this is transparent to the
user, except for the fact that the data will take some time to be actually written to the register. If desired,
software can poll the register to discover when the data was actually written.
5
TSYN
Timer Sync Mode. This bit enables a mechanism that resets the free-running timer each time a message
is received in Message Buffer 0. This feature provides means to synchronize multiple FlexCAN stations
with a special “SYNC” message (i.e., global network time).
0 Timer Sync feature disabled
1 Timer Sync feature enabled
4
LBUF
Lowest Buffer Transmitted First . This bit defines the ordering mechanism for Message Buffer
transmission.
0 Buffer with lowest ID is transmitted first
1 Lowest number buffer is transmitted first
3
LOM
Listen-Only Mode. This bit configures FlexCAN to operate in Listen Only Mode. In this mode, transmission
is disabled, all error counters are frozen and the module operates in a CAN Error Passive mode [Ref. 1].
Only messages acknowledged by another CAN station will be received. If FlexCAN detects a message
that has not been acknowledged, it will flag a BIT0 error (without changing the REC), as if it was trying to
acknowledge the message.
0 Listen Only Mode is deactivated
1 FlexCAN module operates in Listen Only Mode
2–0
PROPSEG
Propagation Segment. This 3-bit field defines the length of the Propagation Segment in the bit time. The
valid programmable values are 0–7.
Propagation Segment Time = (PROPSEG + 1) * Time-Quanta.
Time-Quantum = one Sclock period.
1. One time quantum is equal to the Sclock period.
Table 28-10. CTRL Field Descriptions (Continued)
Field
Description



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