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MAC7200 Datasheet(PDF) 599 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 599 Page - Freescale Semiconductor, Inc

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The Generic FlexCAN2 Module
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
521
28.2.6.3.4
Rx Global Mask (RXGMASK)
This register is provided for legacy support and for low cost MCUs that do not have the individual masking
per Message Buffer feature. See Section 28.2.6.3.11, “Rx Individual Mask Registers
(RXIMR0–RXIMR63).” For MCUs supporting individual masks per MB, setting the BCC bit in MCR
causes the RXGMASK Register to have no effect on the module operation. For MCUs not supporting
individual masks per MB, this register is always effective.
RXGMASK is used as acceptance mask for all received MBs, excluding MBs 14–15, which have their
specific Rx mask registers. The meaning of each mask bit is the following:
•
Mask bit = 0: the corresponding incoming ID bit is “don’t care”
•
Mask bit = 1: the corresponding ID bit is checked against the incoming ID bit, to see if a match
exists
The contents of this register must be programmed while the module is in Freeze Mode, and must not be
modified when the module is transmitting or receiving frames.
Address: Base + $0008
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
000000000000000
0
W
Reset
000000000000000
0
15
14
13
12
11
10
9876543210
R
TIMER
W
Reset
000000000000000
0
Figure 28-5. Free Running Timer (TIMER)
Address: Base + $0010
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
000
MI28
MI27
MI26
MI25
MI24
MI23
MI22
MI21
MI20
MI19
MI18
MI17
MI16
W
Reset
000111111111111
1
15
14
13
12
11
10
9876543210
R
MI15
MI14
MI13
MI12
MI11
MI10
MI9
MI8
MI7
MI6
MI5
MI4
MI3
MI2
MI1
MI0
W
Reset
111111111111111
1
Figure 28-6. Rx Global Mask Register (RXGMASK)



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