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MAC7200 Datasheet(PDF) 607 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 607 Page - Freescale Semiconductor, Inc

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The Generic FlexCAN2 Module
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
529
run) when the CPU writes to the C/S field of that MB (see Section 28.2.7.6.1, “Message Buffer
Deactivation”).
28.2.7.2
Transmit Process
In order to transmit a CAN frame, the CPU should prepare a Message Buffer for transmission by executing
the following procedure:
•
Write ‘1000’ to the Code field of the Control and Status word to keep the MB inactive
•
Write the ID word
•
Write the data bytes
•
Write the Length, Control and Code fields of the Control and Status word to activate the MB
The first and last steps are mandatory. The first write to the Control and Status word is important in case
there was pending reception or transmission. The write operation immediately deactivates the MB,
removing it from any currently ongoing arbitration or ID matching processes, giving time for the CPU to
program the rest of the MB (see Section 28.2.7.6.1, “Message Buffer Deactivation”). Once the MB is
activated in the fourth step, it will participate into the arbitration process and eventually be transmitted
according to its priority. At the end of the successful transmission, the value of the Free Running Timer is
written into the Time Stamp field, the Code field in the Control and Status word is updated, a status flag
is set in the Interrupt Flag Register and an interrupt is generated if allowed by the corresponding Interrupt
Mask Register bit. The new Code field after transmission depends on the code that was used to activate
the MB in step four (see Table 28-7 and Table 28-8 in Section Section 28.2.6.2, “Message Buffer
Structure”).
28.2.7.3
Arbitration Process
The arbitration process is an algorithm executed by the MBM that scans the whole MB memory looking
for the highest priority message to be transmitted. All MBs programmed as transmit buffers will be
scanned to find the lowest ID1 or the lowest MB number, depending on the LBUF bit on the Control
Register. The arbitration process is triggered in the following events:
•
During the CRC field of the CAN frame
•
During the error delimiter field of the CAN frame
•
During Intermission, if the winner MB defined in a previous arbitration was deactivated, or if there
was no MB to transmit, but the CPU wrote to the C/S word of any MB after the previous arbitration
finished
•
When MBM is in Idle or Bus Off state and the CPU writes to the C/S word of any MB
•
Upon leaving Freeze Mode
Once the highest priority MB is selected, it is transferred to a temporary storage space called Serial
Message Buffer (SMB), which has the same structure as a normal MB but is not user accessible. This
operation is called “move-out”. At the first opportunity window on the CAN bus, the message on the SMB
1.
Actually, if LBUF is negated, the arbitration considers not only the ID, but also the RTR and IDE bits placed inside the ID
at the same positions they are transmitted in the CAN frame.



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