MAC7200 datasheet(612/976 Pages) FREESCALE

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The Generic FlexCAN2 Module

MAC7200 Microcontroller Family Reference Manual, Rev. 2

534

Freescale Semiconductor

Deactivation takes precedence over locking. If the CPU deactivates a locked Rx MB, then its lock status

is negated and the MB is marked as invalid for the current matching round. Any pending message on the

SMB will not be transferred anymore to the MB

28.2.7.7

CAN Protocol Related Features

28.2.7.7.1

Remote Frames

Remote frame is a special kind of frame. The user can program a MB to be a Request Remote Frame by

writing the MB as Transmit with the RTR bit set to ‘1’. After the Remote Request frame is transmitted

successfully, the MB becomes a Receive Message Buffer, with the same ID as before.

When a Remote Request frame is received by FlexCAN, its ID is compared to the IDs of the transmit

message buffers with the Code field ‘1010’. If there is a matching ID, then this MB frame will be

transmitted. Note that if the matching MB has the RTR bit set, then FlexCAN will transmit a Remote

Frame as a response.

A received Remote Request Frame is not stored in a receive buffer. It is only used to trigger a transmission

of a frame in response. The mask registers are not used in remote frame matching, and all ID bits (except

RTR) of the incoming received frame should match.

In the case that a Remote Request Frame was received and matched an MB, this message buffer

immediately enters the internal arbitration process, but is considered as normal Tx MB, with no higher

priority. The data length of this frame is independent of the DLC field in the remote frame that initiated its

transmission.

28.2.7.7.2

Overload Frames

FlexCAN does transmit overload frames due to detection of following conditions on CAN bus:

•

Detection of a dominant bit in the first/second bit of Intermission

•

Detection of a dominant bit at the 7th bit (last) of End of Frame field (Rx frames)

•

Detection of a dominant bit at the 8th bit (last) of Error Frame Delimiter or Overload Frame

Delimiter

28.2.7.7.3

Time Stamp

The value of the Free Running Timer is sampled at the beginning of the Identifier field on the CAN bus,

and is stored at the end of “move-in” in the TIME STAMP field, providing network behavior with respect

to time.

Note that the Free Running Timer can be reset upon a specific frame reception, enabling network time

synchronization. Refer to TSYN description in Section 28.2.6.3.2, “Control Register (CTRL).”

28.2.7.7.4

Protocol Timing

Figure 28-12 shows the structure of the clock generation circuitry that feeds the CAN Protocol Interface

(CPI) sub-module. The clock source bit (CLK_SRC) in the CTRL Register defines whether the internal

clock is connected to the output of a crystal oscillator (Oscillator Clock) or to the Peripheral Clock

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