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MAC7200 Datasheet(PDF) 676 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 676 Page - Freescale Semiconductor, Inc |
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676 / 976 page ![]() Memory Map and Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 598 Freescale Semiconductor 30.11.2.8 DSPI Transmit FIFO Registers 0–3 (DSPI_TXFR0–DSPI_TXFR3) The DSPI_TXFR0 - DSPI_TXFR3 registers provide visibility into the TX FIFO for debugging purposes. Each register is an entry in the TX FIFO. The registers are read-only and cannot be modified. Reading the DSPI_TXFRx registers does not alter the state of the TX FIFO. Address: DSPI_BASE + 0x38 Access: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R 0 0 0 0 000000000 0 0 0 W Reset 0 0 0 0 000000000 0 0 0 15 14 13 12 11 10 9876543 2 1 0 RRXDATA W Reset 0 0 0 0 000000000 0 0 0 Figure 30-9. DSPI POP RX FIFO Register (DSPI_POPR) Table 30-20. DSPI_POPR Field Descriptions Field Description 31–16 Reserved, should be cleared. 15–0 RXDATA[15:0] Received Data. The RXDATA field contains the SPI data from the RX FIFO entry pointed to by the Pop Next Data Pointer. Address: DSPI_BASE+0x3C–DSPI_BASE+0x48 Access: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 RTXCMD W Reset 0 0 0 0 000000000 0 0 0 15 14 13 12 11 10 9876543 2 1 0 RTXDATA W Reset 0 0 0 0 000000000 0 0 0 Figure 30-10. DSPI Transmit FIFO Register 0–3 (DSPI_TXFR0–DSPI_TXFR3) |
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