MAC7200 datasheet(677/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

599

30.11.2.9 DSPI Receive FIFO Registers 0–3 (DSPI_RXFR0–DSPI_RXFR3)

The DSPI_RXFR0 - DSPI_RXFR3 registers provide visibility into the RX FIFO for debugging purposes.

Each register is an entry in the RX FIFO. The DSPI_RXFR registers are read-only. Reading the

DSPI_RXFRx registers does not alter the state of the RX FIFO.

30.12 Functional Description

The Deserial Serial Peripheral Interface (DSPI) block supports full-duplex, synchronous serial

communications between MCUs and peripheral devices.

The DSPI_CTAR0 - DSPI_CTAR7 registers hold clock and transfer attributes. The SPI configuration can

select which CTAR to use on a frame by frame basis by setting a field in the SPI command. See

Section 30.11.2.3, “DSPI Clock and Transfer Attributes Registers 0–7 (DSPI_CTAR0–DSPI_CTAR7),”

for information on the fields of the DSPI_CTAR registers.

Table 30-21. DSPI_TXFRn Field Descriptions

Field

Description

31–16

TXCMD[15:0]

Transmit Command. The TXCMD field contains the command that sets the transfer attributes for the SPI

data. See Section 30.11.2.6, “DSPI PUSH TX FIFO Register (DSPI_PUSHR),” for details on the

command field.

15–0

TXDATA[15:0]

Transmit Data. The TXDATA field contains the SPI data to be shifted out.

Address: DSPI_BASE + 0x4C–DSPI_BASE + 0x58

Access:

000000000000000

Reset

000000000000000

9876543210

RXDATA

Reset

000000000000000

Figure 30-11. DSPI Receive FIFO Registers 0–3 (DSPI_RXFR0–DSPI_RXFR3

Table 30-22. DSPI_RXFRn Field Descriptions

Field

Description

31–16

Reserved, should be cleared.

15–0

RXDATA[15:0]

Receive Data. The RXDATA field contains the received SPI data.

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