MAC7200 datasheet(718/976 Pages) FREESCALE

718 / 976 page

Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

640

Freescale Semiconductor

NOTES

If the value of T8 is the same as in the previous transmission, T8 does not

have to be rewritten.The same value is transmitted until T8 is rewritten

In 8-bit data format, only SCI data register low (SCIDRL) needs to be

accessed.

When transmitting in 9-bit data format and using 8-bit write instructions,

write first to SCI data register high (SCIDRH), then SCIDRL.

To increase performance when using 9-bit data format, it is recommended

to access the register with 16-bit reads and writes.

This register should not be used in LIN mode, writes to the register will be

blocked in LIN mode.

Even if parity generation/checking is enabled via PE in the SCICR1 register,

the parity bit will not be masked out. The bit 7 of the received data will be

masked out if the PMSK bit in SCICR4 is set, however.

31.9.2.7

SCI Status Register 1

The SCISR1 and SCISR2 registers indicate the current status. The status flags can be polled, and can also

be used to generate interrupts. The flags can be cleared by writing a 1 to them.

Address Offset: 0x7

Access: User read/write

765

43210

R7R6R5R4R3R2R1R0

Reset

00000000

Figure 31-9. SCI Data Register Low (SCIDRL)

Table 31-10. SCIDRH/L Field Descriptions

Field

Description

Received Bit 8. R8 is the ninth data bit received when the eSCI is configured for 9-bit data format (M = 1).

Transmit Bit 8. T8 is the ninth data bit transmitted when the eSCI is configured for 9-bit data format (M = 1).

5–0

Reserved, should be cleared.

7–0

Received bits seven through zero for 9-bit or 8-bit data formats

7–0

Transmit bits seven through zero for 9-bit or 8-bit formats

MAC7200 Datasheet(PDF) 718 Page - Freescale Semiconductor, Inc