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MAC7200 Datasheet(PDF) 810 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 810 Page - Freescale Semiconductor, Inc

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Functional Description
MAC7200 Microcontroller Family Reference Manual, Rev. 2
732
Freescale Semiconductor
Figure 32-53. OPWMB Mode with Active Output Disable
Figure 32-54 shows a waveform changing from 100% to 0% duty cycle. EDPOL in this case is zero. In
this example B1 is programmed to the same value as the period of the external selected time base.
Figure 32-54. OPWMB Mode from 100% to 0% Duty Cycle
In Figure 32-54 if B1 is set to a value lower than 0x000008 it is not possible to achieve 0% duty cycle by
only changing A1 register value. Since B1 matches have precedence over A1 matches the output pin
transitions to the opposite of EDPOL bit at B1 match. Note also that if B1 is set to 0x000009, for instance,
B1 match does not occur, thus a 0% duty cycle signal is generated.
32.13.1.2 Input Programmable Filter (IPF)
The IPF ensures that only valid input pin transitions are received by the Unified Channel edge detector. A
block diagram of the IPF is shown in Figure 32-55.
The IPF is a 5-bit programmable up counter that is incremented by the selected clock source, according to
bits IF[3:0] in UCCRn register.
EDPOL = 0
cycle n
cycle n+1
cycle n+2
A1 value
B1 value
B2 value
$000008
$000002
$000006
$000008
$000001
Selected
$000004
$000006
MODE[0]= 1
A2 value
$000002
$000004
$000006
$000002
$000004
$000006
$000008
$000006
Output pin
write to B2
write to A2
write to A2
Match A1
Match A1
Match B1
Match B1
Match B1
due to B1 match cycle n-1
FLAG set event
Output Disable
Counter Bus
$000008
$000007
$000006
$000005
$000004
$000003
$000002
$000001
$000000
0%
100%
Selected
EDPOL = 0
A1 value
B1 value
Output pin
$000008
Prescaler = 1
cycle 1
cycle 2
cycle 3
cycle 4
cycle 5
cycle 6
cycle 7
cycle 8
cycle 9
counter bus
$000007
$000006
$000005
$000004
$000003
$000002
$000001
$000000
A2 value



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