MAC7200 datasheet(943/976 Pages) FREESCALE

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Power Dissipation and Thermal Characteristics

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

865

NOTE

The 144LQFP packages are not currently qualified; any future qualification

will be based upon customer demand and will be subject to specified

leadtimes. This package option is supported for limited samples only, and

does not include burn-in testing.

1. 100 LQFP, Case Outline: 983–02

2. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

3. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board (JESD51-3) horizontal.

4. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.

5. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on

the top surface of the board at the center lead. For fused lead packages, the adjacent lead is used.

6. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method

1012.1).

7. Thermal characterization parameter indicating the temperature difference between package top and junction temperature per

JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.

Table A-9. Thermal Resistance for 144 lead 20x20 mm LQFP, 0.5 mm Pitch1

1. 144 LQFP, Case Outline: 918–03

Rating

Value

Unit

Junction to Ambient (Natural Convection)2, 3

2. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

3. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board (JESD51-3) horizontal.

Single layer board (1s)

θJA

TBD

°C/W

Junction to Ambient (Natural Convection)2, 4

4. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.

Four layer board (2s2p)

θJMA

TBD

°C/W

Junction to Ambient (@ 200 ft./min.)2, 4

Single layer board (1s)

θJMA

TBD

°C/W

Junction to Ambient (@ 200 ft./min.)2, 4

Four layer board (2s2p)

θJMA

TBD

°C/W

Junction to Board5

5. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on

the top surface of the board at the center lead. For fused lead packages, the adjacent lead is used.

θJB

TBD

°C/W

Junction to Case6

6. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method

1012.1).

θJC

TBD

°C/W

Junction to Package Top7

7. Thermal characterization parameter indicating the temperature difference between package top and junction temperature per

JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.

Natural Convection

ΨJT

TBD

°C/W

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