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FX980 Datasheet(PDF) 27 Page - CML Microcircuits |
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FX980 Datasheet(HTML) 27 Page - CML Microcircuits |
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27 / 86 page ![]() TETRA Baseband Processor FX980 © 1997 Consumer Microcircuits Limited 27 D/980/3 RxSetup1 Title: First Receive Set-up control register Address: $0x08 Function: RW Description: Receive path set-up and initialisation control bits. Bit Name Active State Function 7 Rx32BitMode High RW When set active, the Rx port operates on 32-bit frames - I data in the MSB word, Q data in the LSB word. 6 RxSampleSel High RW This bit is used to select which pair of I,Q samples is supplied from the possible two when the DataRateHi bit in ConfigCtrl1 register is in the low mode (inactive). It has no effect when DataRateHi is active. 5 RxClkStop High RW When set active causes the RxEn bit to also be used to gate the Rx Data path master clock. When inactive (default state) the Rx Data path master clock is always supplied. 4 RxEn High RW When set active, enables the Rx Data path, which then starts to process the differential data on the IRXP,IRXN and QRXP,QRXN pins, outputting results via the Rx serial port. This bit also acts as a receive section power enable bit. 3 RxBistActive High RW When set active, enables Rx Built-In Self Test (BIST) operation. 2 AnaAdcReset Pulse W When this bit is set High, a 4-clock-cycle ADC auto reset event is generated. It is not necessary to clear this bit before another ADC auto reset event is initiated. R The read state of this bit indicates the logic level last written to this bit. It does not have a functional significance and is only available for test purposes. 1 AnaEnAutoReset Low RW When active this bit enables the ADC auto reset function. On taking N_RESET Low, this bit is set active, which is the default operating condition. 0 RxFirCoeffReset Low RW When set active forces all the Rx Data path filters to load their default coefficient values. This bit will be set active on taking N_RESET Low, and therefore needs to be deactivated before default filter coefficients can be overwritten. Normal filter operation is unaffected by leaving this bit set. |
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