FX980 datasheet(55/86 Pages) CMLMICRO

55 / 86 page

TETRA Baseband Processor

FX980

D/980/3

TxIQGainMult

Title:

Transmit I and Q channel Gain Multiplier registers

Address:

$0x42, $0x43 , $0x48 and $0x49 (4 locations)

Function:

Description:

A 2s-complement multiplication is performed on the magnitude of the Tx Data path signal and

the result is then re-normalised to the system’s dynamic range: thus the function may be

considered as a digital attenuator. This register sets the multiplier, the result being given by the

formula:

out

val













Where:

Din

Dout

val

is the signal input,

is the signal output,

is the value in the register.

Bit

Name

Active State

Function

Address $0x42

7:0

TxIGainLSB

Data RW

Least significant 8 bits of the TxIGain register (G

val).

Address $0x43

7:3

Reserved. Set these bits Low. Undefined on read.

2:0

TxIGainMSB

Data RW

Most significant 3 bits of the TxIGain register (G

val).

Address $0x48

7:0

TxQGainLSB

Data RW

Least significant 8 bits of the TxQGain register (G

val).

Address $0x49

7:3

Reserved. Set these bits Low. Undefined on read.

2:0

TxQGainMSB

Data RW

Most significant 3 bits of the TxQGain register (G

val).

FX980 Datasheet(PDF) 55 Page - CML Microcircuits

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