FX980 datasheet(47/86 Pages) CMLMICRO

47 / 86 page

TETRA Baseband Processor

FX980

D/980/3

TxFIFOStatMask

Title:

Transmit data FIFO Status interrupt Mask register

Address:

$0x23

Function:

Description:

Masks interrupts in the TxFIFOStatus register. On taking N_RESET Low, these bits are set

active, so masking out all possible interrupt sources. Each inactive bit will allow its associated

status bit to generate an interrupt. In the case of the status bits marked in the TxFIFOStatus

mechanism.

Bit

Name

Active State

Function

n_TxPathEn_Mask

Low

Tx Data path active interrupt mask bit.

n_FIFOUnderRead_Mask

Low

FIFO underflow interrupt mask bit.

n_FIFOOverWrite_Mask

Low

FIFO overflow interrupt mask bit.

n_FIFOFull_Mask

Low

FIFO full interrupt mask bit.

n_FIFOLength1_Mask

Low

FIFO length status (MSB) interrupt mask bit.

n_FIFOLength0_Mask

Low

FIFO length status (LSB) interrupt mask bit.

n_FIFOEmpty_Mask

Low

FIFO empty interrupt mask bit.

Data

Reserved for manufacturer’s test purposes. This bit

should be set Low.

• Address and Data format for TxFIFOStatMask access

D7 D6 D5 D4 D3 D2

Data field [7:0]

Address field [6:0]

FX980 Datasheet(PDF) 47 Page - CML Microcircuits

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