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FX980 Datasheet(PDF) 49 Page - CML Microcircuits |
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FX980 Datasheet(HTML) 49 Page - CML Microcircuits |
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49 / 86 page ![]() TETRA Baseband Processor FX980 © 1997 Consumer Microcircuits Limited 49 D/980/3 Address $0x2B 7:0 Rx49tapCoeffMSB Data RW Receive 49-tap filter MSB coefficient data port. Address $0x2C 7:0 Rx63tapCoeffLSB Data RW Receive 63-tap filter LSB coefficient data port. Post-increment the coefficient address pointer. Address $0x2D 7:0 RX63tapCoeffMSB Data RW Receive 63-tap filter MSB coefficient data port. • Address and Data format for 15-tap Tx FIR Coefficient Ram IO access D11 D10 D9 D8 R R R R D7 D6 D5 D4 D3 D2 D1 D0 Coefficient Data field [11:0] Address field [6:1] (Coefficient Pointer)++ 0 Coefficient Pointer 1 0 1 0 A0 0 1 0 • Address and Data format for 49-tap Tx FIR Coefficient Ram IO access D11 D10 D9 D8 R R R R D7 D6 D5 D4 D3 D2 D1 D0 Coefficient Data field [11:0] Address field [6:1] (Coefficient Pointer)++ 0 Coefficient Pointer 1 0 1 1 A0 0 1 0 • Address and Data format for 79-tap Tx FIR Coefficient Ram IO access D11 D10 D9 D8 R R R R D7 D6 D5 D4 D3 D2 D1 D0 Coefficient Data field [11:0] Address field [6:1] (Coefficient Pointer)++ 0 Coefficient Pointer 1 1 0 0 A0 0 1 0 |
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