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PCM9211 Datasheet(PDF) 79 Page - Texas Instruments |
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PCM9211 Datasheet(HTML) 79 Page - Texas Instruments |
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79 / 121 page  PCM9211 www.ti.com SBAS495 – JUNE 2010 Register 32h, DIR Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting (Address: 32h, Write and Read) DATA B7 B6 B5 B4 B3 B2 B1 B0 Reg Name RSV PSBCK2 PSBCK1 PSBCK0 RSV PSLRCK2 PSLRCK1 PSLRCK0 Default Value 0 0 1 0 0 0 1 0 Memo PSBCK[2:0]: DIR Clock Source, Secondary BCK (SBCK) Frequency Setting 000: 16fS (BCK/4) 001: 32fS (BCK/2) 010: 64fS (1x BCK) (default) 011: 128fS (2x BCK) 100: 256fS (4x BCK) 101: Reserved 110: Reserved 111: Reserved PSLRCK[2:0]: DIR Clock Source, Secondary LRCK (SLRCK) Frequency Setting 000: fS/4 (LRCK/4) 001: fS/2 (LRCK/2) 010: fS (1x LRCK) (default) 011: 2fS (2x LRCK) 100: 4fS (4x LRCK) 101: Reserved 110: Reserved 111: Reserved spacer Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 79 Product Folder Link(s): PCM9211 |
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