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PCM9211 Datasheet(PDF) 22 Page - Texas Instruments

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Part # PCM9211
Description  Integrated DIX, ADC, and Signal Routing: ??Asynchronous Operation (DIR, DIT, ADC) ??Mux and Routing of PCM Data: ??I2S?? Left-Justified, Right-Justified
PDF  121 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCM9211 Datasheet(HTML) 22 Page - Texas Instruments

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DOUT
0.5VDD
1.4V
LRCK
(INPUT)
BCK
(INPUT)
1.4V
tBCH
tBC L
tBC Y
tLRH
tDOD
tLRS
PCM9211
SBAS495 – JUNE 2010
www.ti.com
ADC: Audio Interface Mode and Timing
The digital audio data can be interfaced in either slave or master mode. The interface mode is selected by using
the serial mode control described in the Serial Control Mode section. The default mode is slave mode. Master
mode is available only for ADC standalone operation by setting Register 6Fh/MPCSEL. In slave mode, BCK and
LRCK are inputs to the ADC. BCK must be 64fS. DOUT changes on the falling edge of BCK. The default timing
specification is shown in Figure 15.
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
tBCY
BCK Cycle Time
75
ns
tBCH
BCK High Time
35
ns
tBCL
BCK Low Time
35
ns
tLRS
LRCK Set-up Time to BCK Rising Edge
10
ns
tLRH
LRCK Hold Time to BCK Rising Edge
10
ns
tDOD
DOUT Delay Time from BCK Falling Edge
10
70
ns
Note:
Load capacitance of output is 20 pF. This timing requirement is applied when the ADC is working in standalone mode.
The master mode through MPIO_C ports are set by Register 48h/ADIFMD and Register 6Fh/MPCSEL.
Figure 15. Audio Data Interface Timing (Slave Mode: BCK and LRCK Work as Inputs)
22
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Product Folder Link(s): PCM9211



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