AD9516-5PCBZ datasheet(6/76 Pages) AD

6 / 76 page

AD9516-5

Rev. A | Page 6 of 76

CLOCK INPUTS

Table 3.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

CLOCK INPUTS (CLK, CLK)

Differential input

Input Frequency

2.4

GHz

High frequency distribution (VCO divider enabled)

1.6

GHz

Distribution only (VCO divider bypassed; this is the

frequency range supported by the channel divider)

Input Sensitivity, Differential

150

mV p-p

Measured at 2.4 GHz; jitter performance is

improved with slew rates > 1 V/ns

Input Level, Differential

V p-p

Larger voltage swings may turn on the

protection diodes and may degrade jitter

performance

Input Common-Mode Voltage, VCM

1.3

1.57

1.8

Self-biased; enables ac coupling

Input Common-Mode Range, VCMR

1.3

1.8

With 200 mV p-p signal applied; dc-coupled

Input Sensitivity, Single-Ended

150

mV p-p

CLK ac-coupled; CLK ac-bypassed to RF ground

Input Resistance

3.9

4.7

5.7

kΩ

Self-biased

Input Capacitance

1 Below about 1 MHz, the input should be dc-coupled. Care should be taken to match VCM.

CLOCK OUTPUTS

Table 4.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LVPECL CLOCK OUTPUTS

Termination = 50 Ω to VS_LVPECL − 2 V

OUT0, OUT1, OUT2, OUT3, OUT4,

OUT5

Differential (OUT, OUT)

Output Frequency, Maximum

2400

MHz

Using direct to output; see Figure 20 for peak-to-

peak differential amplitude

Output High Voltage (VOH)

VS_LVPECL − 1.12

VS_LVPECL − 0.98

VS_LVPECL − 0.84

Measured at dc using the default amplitude setting;

see Figure 20 for amplitude vs. frequency

Output Low Voltage (VOL)

VS_LVPECL − 2.03

VS_LVPECL − 1.77

VS_LVPECL − 1.49

Measured at dc using the default amplitude setting;

see Figure 20 for amplitude vs. frequency

Output Differential Voltage (VOD)

550

790

980

VOH − VOL for each leg of a differential pair for

default amplitude setting with driver not toggling;

see Figure 20 for variation over frequency

LVDS CLOCK OUTPUTS

Differential termination 100 Ω at 3.5 mA

OUT6, OUT7, OUT8, OUT9

Differential (OUT, OUT)

Output Frequency, Maximum

800

MHz

The AD9516 outputs can toggle at higher

frequencies, but the output amplitude may not

meet the VOD specification; see Figure 21

Differential Output Voltage (VOD)

247

360

454

VOH − VOL measurement across a differential pair

at the default amplitude setting with output

driver not toggling; see Figure 21 for variation

over frequency

Delta VOD

This is the absolute value of the difference between

VOD when the normal output is high vs. when the

complementary output is high

Output Offset Voltage (VOS)

1.125

1.24

1.375

(VOH + VOL)/2 across a differential pair at the

default amplitude setting with output driver not

toggling

Delta VOS

This is the absolute value of the difference between

VOS when the normal output is high vs. when the

complementary output is high

Short-Circuit Current (ISA, ISB)

Output shorted to GND

CMOS CLOCK OUTPUTS

OUT6A, OUT6B, OUT7A, OUT7B,

OUT8A, OUT8B, OUT9A, OUT9B

Single-ended; termination = 10 pF

Output Frequency

250

MHz

See Figure 22

Output Voltage High (VOH)

VS_LVPECL − 0.1

At 1 mA load

Output Voltage Low (VOL)

0.1

At 1 mA load

AD9516-5PCBZ Datasheet(PDF) 6 Page - Analog Devices

AD9516-5PCBZ Datasheet(HTML) 6 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

Datasheet Download

Link URL