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AD9516-5PCBZ Datasheet(PDF) 12 Page - Analog Devices |
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AD9516-5PCBZ Datasheet(HTML) 12 Page - Analog Devices |
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12 / 76 page ![]() AD9516-5 Rev. A | Page 12 of 76 Parameter Min Typ Max Unit Test Conditions/Comments POWER DELTAS, INDIVIDUAL FUNCTIONS Power delta when a function is enabled/disabled VCO Divider 30 mW VCO divider bypassed REFIN (Differential) 20 mW All references off to differential reference enabled REF1, REF2 (Single-Ended) 4 mW All references off to REF1 or REF2 enabled; differential reference not enabled PLL 75 mW PLL off to PLL on, normal operation; no reference enabled Channel Divider 30 mW Divider bypassed to divide-by-2 to divide-by-32 LVPECL Channel (Divider Plus Output Driver) 120 mW No LVPECL output on to one LVPECL output on (that is, enabling OUT0 with OUT1 off; Divider 0 enabled), independent of frequency LVPECL Driver 90 mW Second LVPECL output turned on, same channel (that is, enabling OUT0 with OUT1 already on) LVDS Channel (Divider Plus Output Driver) 140 mW No LVDS output on to one LVDS output on (that is, enabling OUT8 with OUT9 off with Divider 4.1 enabled and Divider 4.2 bypassed); see Figure 8 for dependence on output frequency LVDS Driver 50 mW Second LVDS output turned on, same channel (that is, enabling OUT8 with OUT9 already on) CMOS Channel (Divider Plus Output Driver) 100 mW Static; no CMOS output on to one CMOS output on (that is, enabling OUT8A starting with OUT8 and OUT9 off); see Figure 9 for variation over output frequency CMOS Driver (Second in Pair) 0 mW Static; second CMOS output, same pair, turned on (that is, enabling OUT8A with OUT8B already on) CMOS Driver (First in Second Pair) 30 mW Static; first output, second pair, turned on (that is, enabling OUT9A with OUT9B off and OUT8A and OUT8B already on) Fine Delay Block 50 mW Delay block off to delay block enabled; maximum current setting |
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