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AM79C976 Datasheet(PDF) 207 Page - Advanced Micro Devices |
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AM79C976 Datasheet(HTML) 207 Page - Advanced Micro Devices |
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207 / 309 page ![]() 8/01/00 Am79C976 207 P R E L I M INARY affected by S_RESET or setting the STOP bit. 3 RES Reserved location. Written and read as zeros. 2 RCVE Receive Status Enable. When this bit is set, a value of 1 is passed to the LEDOUT bit in this register when there is receive ac- tivity on the network. Read/Write accessible. RCVE is cleared by H_RESET and is not affected by S_RESET or setting the STOP bit. 1 SFBDE Start Frame/Byte Delimiter En- able. When this bit is set, a value of 1 is passed to the LEDOUT bit in this register when the RXD[3:0] pins are presenting the least sig- nificant nibble of valid frame data. Read/Write accessible. RCVE is cleared by H_RESET and is not affected by S_RESET or setting the STOP bit. 0 COLE Collision Status Enable. When this bit is set, a value of 1 is passed to the LEDOUT bit in this register when there is collision activity on the network. Read/Write accessible. COLE is set to 1 by H_RESET and is not affected by S_RESET or setting the STOP bit. %&5)XOO'XSOH[ &RQWURO Note: Bits 15-0 in this register are programmable through the EEPROM. Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-3 RES Reserved locations. Written as zeros and read as undefined. 2 FDRPAD Full-Duplex Runt Packet Accept Disable. When FDRPAD is set to 1 and full-duplex mode is en- abled, the Am79C976 controller will only receive frames that meet the minimum Ethernet frame length of 64 bytes. Receive DMA will not start until at least 64 bytes or a complete frame have been received. When FDRPAD is cleared to 0, the Am79C976 con- troller will accept any frame of 12 bytes or greater, and receive DMA will start according to the programming of the receive FIFO watermark. Read/Write accessible. FDRPAD is set to 1 by H_RESET and is not affected by S_RESET or by set- ting the STOP bit. 1 RES Reserved locations. Written as zeros and read as undefined. 0 FDEN Full-Duplex Enable. FDEN con- trols whether full-duplex opera- tion is enabled. When FDEN is cleared and the Auto-Negotiation is disabled, full-duplex operation is not enabled and the Am79C976 controller will always operate in the half-duplex mode. When FDEN is set, the Am79C976 controller will operate in full-duplex mode when the MII port is enabled. Do not set this bit when Auto-Negotiation is enabled. Read/Write accessible. FDEN is reset to 0 by H_RESET, and is unaffected by S_RESET and the STOP bit. %&5,2 %DVH $GGUHVV /RZHU Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-5 IOBASEL Reserved locations. After H_RESET, the value of these bits will be undefined. The settings of these bits will have no effect on any Am79C976 controller func- tion. It is only included for soft- ware compatibility with other PCnet family devices. Read/Write accessible. IO- BASEL is not affected by S_RESET or STOP. 4-0 RES Reserved locations. Written as zeros, read as undefined. |
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